riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-06-26	softfloat: merge floatx80_mod and floatx80_rem	Joseph Myers	2	-84/+0
2020-06-26	target/i386: reimplement f2xm1 using floatx80 operations	Joseph Myers	1	-3/+382
2020-06-25	Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into staging	Peter Maydell	3	-23/+46
2020-06-23	target/arm: Check supported KVM features globally (not per vCPU)	Philippe Mathieu-Daudé	5	-29/+22
2020-06-23	target/arm: Remove dead code relating to SABA and UABA	Peter Maydell	1	-12/+0
2020-06-23	target/arm: Remove unnecessary gen_io_end() calls	Peter Maydell	3	-8/+4
2020-06-23	target/arm: Move some functions used only in translate-neon.inc.c to that file	Peter Maydell	2	-101/+101
2020-06-23	target/arm: Convert Neon VTRN to decodetree	Peter Maydell	3	-362/+93
2020-06-23	target/arm: Convert Neon VSWP to decodetree	Peter Maydell	3	-4/+44
2020-06-23	target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree	Peter Maydell	3	-62/+87
2020-06-23	target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree	Peter Maydell	3	-26/+74
2020-06-23	target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to decodetree	Peter Maydell	3	-45/+39
2020-06-23	target/arm: Convert simple fp Neon 2-reg-misc insns	Peter Maydell	4	-49/+78
2020-06-23	target/arm: Convert Neon VQABS, VQNEG to decodetree	Peter Maydell	3	-28/+40
2020-06-23	target/arm: Convert remaining simple 2-reg-misc Neon ops	Peter Maydell	3	-31/+86
2020-06-23	target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree	Peter Maydell	4	-10/+60
2020-06-23	target/arm: Make gen_swap_half() take separate src and dest	Peter Maydell	2	-6/+6
2020-06-23	target/arm: Fix capitalization in NeonGenTwo{Single, Double}OPFn typedefs	Peter Maydell	3	-5/+5
2020-06-23	target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn	Peter Maydell	2	-3/+3
2020-06-23	target/arm: Convert Neon 2-reg-misc crypto operations to decodetree	Peter Maydell	3	-48/+58
2020-06-23	target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree	Peter Maydell	3	-27/+74
2020-06-23	target/arm: Convert Neon VCVT f16/f32 insns to decodetree	Peter Maydell	3	-62/+102
2020-06-23	target/arm: Convert Neon 2-reg-misc VSHLL to decodetree	Peter Maydell	3	-34/+55
2020-06-23	target/arm: Convert Neon narrowing moves to decodetree	Peter Maydell	3	-79/+70
2020-06-23	target/arm: Convert VZIP, VUZP to decodetree	Peter Maydell	3	-90/+79
2020-06-23	target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree	Peter Maydell	3	-33/+157
2020-06-23	target/arm: Convert Neon 2-reg-misc VREV64 to decodetree	Peter Maydell	3	-22/+64
2020-06-22	target/xtensa: drop gen_io_end call	Max Filippov	1	-3/+0
2020-06-19	hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004	Bin Meng	1	-8/+8
2020-06-19	target/riscv: Rename IBEX CPU init routine	Bin Meng	1	-2/+2
2020-06-19	target/riscv: Use a smaller guess size for no-MMU PMP	Alistair Francis	1	-5/+9
2020-06-19	target/riscv: Implement checks for hfence	Alistair Francis	3	-26/+24
2020-06-19	target/riscv: Move the hfence instructions to the rvh decode	Alistair Francis	4	-41/+63
2020-06-19	target/riscv: Report errors validating 2nd-stage PTEs	Alistair Francis	1	-2/+7
2020-06-19	target/riscv: Set access as data_load when validating stage-2 PTEs	Alistair Francis	1	-1/+1
2020-06-19	riscv: Keep the CPU init routine names consistent	Bin Meng	1	-4/+4
2020-06-19	riscv: Generalize CPU init routine for the imacu CPU	Bin Meng	1	-21/+10
2020-06-19	riscv: Generalize CPU init routine for the gcsu CPU	Bin Meng	1	-14/+6
2020-06-19	riscv: Generalize CPU init routine for the base CPU	Bin Meng	1	-13/+5
2020-06-19	riscv: Add helper to make NaN-boxing for FP register	Ian Jiang	1	-2/+15
2020-06-18	vfio-ccw: Add support for the schib region	Farhan Ali	1	-2/+1
2020-06-16	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200616'...	Peter Maydell	7	-689/+1302
2020-06-16	Merge remote-tracking branch 'remotes/armbru/tags/pull-qom-2020-06-15' into s...	Peter Maydell	1	-2/+1
2020-06-16	target/arm/cpu: adjust virtual time for all KVM arm cpus	fangying	3	-13/+15
2020-06-16	target/arm: Convert Neon VDUP (scalar) to decodetree	Peter Maydell	3	-24/+34
2020-06-16	target/arm: Convert Neon VTBL, VTBX to decodetree	Peter Maydell	3	-37/+63
2020-06-16	target/arm: Convert Neon VEXT to decodetree	Peter Maydell	3	-57/+85
2020-06-16	target/arm: Convert Neon 2-reg-scalar long multiplies to decodetree	Peter Maydell	3	-176/+187
2020-06-16	target/arm: Convert Neon 2-reg-scalar VQRDMLAH, VQRDMLSH to decodetree	Peter Maydell	3	-36/+79
2020-06-16	target/arm: Convert Neon 2-reg-scalar VQDMULH, VQRDMULH to decodetree	Peter Maydell	3	-40/+34