riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-09-05	target/arm: Convert CLZ	Richard Henderson	3	-16/+24
2019-09-05	target/arm: Convert BX, BXJ, BLX (register)	Richard Henderson	3	-40/+47
2019-09-05	target/arm: Convert Cyclic Redundancy Check	Richard Henderson	3	-65/+72
2019-09-05	target/arm: Convert MRS/MSR (banked, register)	Richard Henderson	3	-141/+145
2019-09-05	target/arm: Convert MSR (immediate) and hints	Richard Henderson	3	-18/+84
2019-09-05	target/arm: Simplify op_smlawx for SMLAW*	Richard Henderson	1	-8/+8
2019-09-05	target/arm: Simplify op_smlaxxx for SMLAL*	Richard Henderson	1	-7/+8
2019-09-05	target/arm: Convert Halfword multiply and multiply accumulate	Richard Henderson	3	-97/+170
2019-09-05	target/arm: Convert Saturating addition and subtraction	Richard Henderson	3	-27/+67
2019-09-05	target/arm: Simplify UMAAL	Richard Henderson	1	-22/+12
2019-09-05	target/arm: Convert multiply and multiply accumulate	Richard Henderson	3	-107/+177
2019-09-05	target/arm: Convert Data Processing (immediate)	Richard Henderson	3	-334/+186
2019-09-05	target/arm: Convert Data Processing (reg-shifted-reg)	Richard Henderson	3	-20/+87
2019-09-05	target/arm: Convert Data Processing (register)	Richard Henderson	3	-36/+271
2019-09-05	target/arm: Add stubs for aa32 decodetree	Richard Henderson	5	-1/+114
2019-09-05	target/arm: Use store_reg_from_load in thumb2 code	Richard Henderson	1	-9/+3
2019-09-04	target/openrisc: Update cpu "any" to v1.3	Richard Henderson	1	-1/+1
2019-09-04	target/openrisc: Implement l.adrp	Richard Henderson	3	-0/+16
2019-09-04	target/openrisc: Implement move to/from FPCSR	Richard Henderson	5	-5/+38
2019-09-04	target/openrisc: Implement unordered fp comparisons	Richard Henderson	5	-0/+145
2019-09-04	target/openrisc: Add support for ORFPX64A32	Richard Henderson	6	-3/+332
2019-09-04	target/openrisc: Check CPUCFG_OF32S for float insns	Richard Henderson	2	-50/+36
2019-09-04	target/openrisc: Fix lf.ftoi.s	Richard Henderson	1	-1/+1
2019-09-04	target/openrisc: Add VR2 and AVR special processor registers	Richard Henderson	3	-6/+19
2019-09-04	target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init	Richard Henderson	3	-13/+22
2019-09-04	target/openrisc: Make VR and PPC read-only	Richard Henderson	2	-12/+1
2019-09-04	target/openrisc: Cache R0 in DisasContext	Richard Henderson	1	-7/+12
2019-09-04	target/openrisc: Replace cpu register array with a function	Richard Henderson	1	-97/+116
2019-09-04	target/openrisc: Add DisasContext parameter to check_r0_write	Richard Henderson	1	-47/+49
2019-09-04	Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging	Peter Maydell	25	-197/+197
2019-09-04	Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190903'...	Peter Maydell	7	-22/+160
2019-09-04	Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-aug-29-2019' ...	Peter Maydell	3	-586/+685
2019-09-03	s390x/tcg: Pass a size to probe_write() in do_csst()	David Hildenbrand	1	-3/+1
2019-09-03	hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY	David Hildenbrand	1	-2/+0
2019-09-03	mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well	David Hildenbrand	1	-5/+3
2019-09-03	tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code	David Hildenbrand	1	-7/+0
2019-09-03	s390x/tcg: Fix length calculation in probe_write_access()	David Hildenbrand	1	-1/+1
2019-09-03	s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access()	David Hildenbrand	1	-1/+1
2019-09-03	target/sparc: sun4u Invert Endian TTE bit	Tony Nguyen	2	-1/+9
2019-09-03	target/sparc: Add TLB entry with attributes	Tony Nguyen	1	-14/+18
2019-09-03	target/mips: Hard code size with MO_{8\|16\|32\|64}	Tony Nguyen	1	-2/+2
2019-09-03	target/mips: Access MemoryRegion with MemOp	Tony Nguyen	1	-2/+3
2019-09-03	tcg: TCGMemOp is now accelerator independent MemOp	Tony Nguyen	20	-162/+162
2019-09-03	target/arm: Don't abort on M-profile exception return in linux-user mode	Peter Maydell	1	-1/+20
2019-09-03	target/arm: Free TCG temps in trans_VMOV_64_sp()	Peter Maydell	1	-0/+2
2019-09-03	target/arm: Fix SMMLS argument order	Richard Henderson	1	-2/+18
2019-09-03	target/arm: Take exceptions on ATS instructions when needed	Peter Maydell	1	-15/+92
2019-09-03	target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions	Peter Maydell	3	-1/+18
2019-09-03	target/arm: Factor out unallocated_encoding for aarch32	Richard Henderson	2	-12/+13
2019-09-03	Revert "target/arm: Use unallocated_encoding for aarch32"	Richard Henderson	5	-15/+21