riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-09-26	target/i386: Fix broken build with WHPX enabled	Philippe Mathieu-Daudé	1	-0/+1
2019-09-26	target/alpha: Tidy helper_fp_exc_raise_s	Richard Henderson	1	-11/+4
2019-09-26	target/alpha: Mask IOV exception with INV for user-only	Richard Henderson	1	-0/+7
2019-09-26	target/alpha: Write to fpcr_flush_to_zero once	Richard Henderson	1	-5/+4
2019-09-26	target/alpha: Handle SWCR_MAP_DMZ earlier	Richard Henderson	1	-4/+1
2019-09-26	target/alpha: Fix SWCR_TRAP_ENABLE_MASK	Richard Henderson	1	-9/+14
2019-09-26	target/alpha: Fix SWCR_MAP_UMZ	Richard Henderson	1	-1/+1
2019-09-26	target/alpha: Use array for FPCR_DYN conversion	Richard Henderson	1	-16/+8
2019-09-23	Merge remote-tracking branch 'remotes/davidhildenbrand/tags/s390x-tcg-2019-09...	Peter Maydell	5	-225/+544
2019-09-23	s390x/tcg: MVO: Fault-safe handling	David Hildenbrand	1	-12/+15
2019-09-23	s390x/tcg: MVST: Fault-safe handling	David Hildenbrand	1	-7/+17
2019-09-23	s390x/tcg: MVZ: Fault-safe handling	David Hildenbrand	1	-4/+13
2019-09-23	s390x/tcg: MVN: Fault-safe handling	David Hildenbrand	1	-4/+13
2019-09-23	s390x/tcg: MVCIN: Fault-safe handling	David Hildenbrand	1	-3/+12
2019-09-23	s390x/tcg: NC: Fault-safe handling	David Hildenbrand	1	-4/+13
2019-09-23	s390x/tcg: XC: Fault-safe handling	David Hildenbrand	1	-6/+12
2019-09-23	s390x/tcg: OC: Fault-safe handling	David Hildenbrand	1	-4/+13
2019-09-23	s390x/tcg: MVCLU: Fault-safe handling	David Hildenbrand	1	-3/+5
2019-09-23	s390x/tcg: MVC: Fault-safe handling on destructive overlaps	David Hildenbrand	1	-2/+3
2019-09-23	s390x/tcg: MVCS/MVCP: Use access_memmove()	David Hildenbrand	1	-14/+12
2019-09-23	s390x/tcg: Fault-safe memmove	David Hildenbrand	1	-99/+139
2019-09-23	s390x/tcg: Fault-safe memset	David Hildenbrand	1	-20/+103
2019-09-23	s390x/tcg: Always use MMU_USER_IDX for CONFIG_USER_ONLY	David Hildenbrand	2	-0/+8
2019-09-23	s390x/tcg: MVST: Fix storing back the addresses to registers	David Hildenbrand	4	-19/+19
2019-09-23	s390x/tcg: MVST: Check for specification exceptions	David Hildenbrand	1	-0/+3
2019-09-23	s390x/tcg: MVCS/MVCP: Properly wrap the length	David Hildenbrand	1	-0/+6
2019-09-23	s390x/tcg: MVCOS: Lengths are 32 bit in 24/31-bit mode	David Hildenbrand	1	-3/+11
2019-09-23	s390x/tcg: MVCS/MVCP: Check for special operation exceptions	David Hildenbrand	1	-0/+12
2019-09-23	s390x/tcg: MVCLU/MVCLE: Process max 4k bytes at a time	David Hildenbrand	1	-23/+31
2019-09-23	s390x/tcg: MVPG: Properly wrap the addresses	David Hildenbrand	1	-2/+9
2019-09-23	s390x/tcg: MVPG: Check for specification exceptions	David Hildenbrand	1	-0/+7
2019-09-23	s390x/tcg: MVC: Use is_destructive_overlap()	David Hildenbrand	1	-1/+1
2019-09-23	s390x/tcg: MVC: Increment the length once	David Hildenbrand	1	-8/+12
2019-09-23	s390x/tcg: MVCL: Process max 4k bytes at a time	David Hildenbrand	1	-6/+38
2019-09-23	s390x/tcg: MVCL: Detect destructive overlaps	David Hildenbrand	1	-1/+18
2019-09-23	s390x/tcg: MVCL: Zero out unused bits of address	David Hildenbrand	1	-2/+21
2019-09-23	s390x/tcg: Reset exception_index to -1 instead of 0	David Hildenbrand	1	-3/+3
2019-09-23	s390x/cpumodel: Add the z15 name to the description of gen15a	Christian Borntraeger	1	-1/+1
2019-09-23	s390x/kvm: Officially require at least kernel 3.15	Thomas Huth	1	-0/+7
2019-09-20	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-reques...	Peter Maydell	1	-4/+4
2019-09-19	target/m68k/fpu_helper.c: rename the access arguments	KONRAD Frederic	1	-4/+4
2019-09-17	gdbstub: riscv: fix the fflags registers	KONRAD Frederic	1	-2/+4
2019-09-17	target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point	Alistair Francis	1	-1/+1
2019-09-17	target/riscv: Fix mstatus dirty mask	Alistair Francis	1	-1/+1
2019-09-17	target/riscv: Use both register name and ABI name	Atish Patra	1	-8/+11
2019-09-17	riscv: hmp: Add a command to show virtual memory mappings	Bin Meng	2	-0/+233
2019-09-17	riscv: rv32: Root page table address can be larger than 32-bit	Bin Meng	1	-5/+5
2019-09-17	target/riscv: Update the Hypervisor CSRs to v0.4	Alistair Francis	1	-17/+18
2019-09-17	target/riscv: Create function to test if FP is enabled	Alistair Francis	3	-10/+26
2019-09-17	target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events	Philippe Mathieu-Daudé	2	-21/+16