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Author
Files
Lines
2018-03-02
target/arm: Define an IDAU interface
Peter Maydell
4
-3
/
+104
2018-03-02
tricore: renamed masking of PIE
David Brenken
2
-9
/
+10
2018-03-02
tricore: renamed masking of IE
David Brenken
3
-11
/
+13
2018-03-02
tricore: added CORE_ID
David Brenken
2
-0
/
+2
2018-03-02
tricore: added some missing cpu instructions
David Brenken
2
-0
/
+30
2018-03-01
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20180301-v2' into sta...
Peter Maydell
13
-90
/
+194
2018-03-01
s390x/tcg: fix loading 31bit PSWs with the highest bit set
David Hildenbrand
1
-0
/
+4
2018-03-01
target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPU
Peter Maydell
1
-0
/
+1
2018-03-01
arm/translate-a64: add all single op FP16 to handle_fp_1src_half
Alex Bennée
1
-0
/
+71
2018-03-01
arm/translate-a64: implement simd_scalar_three_reg_same_fp16
Alex Bennée
1
-0
/
+99
2018-03-01
arm/translate-a64: add all FP16 ops in simd_scalar_pairwise
Alex Bennée
1
-26
/
+54
2018-03-01
arm/translate-a64: add FP16 FMOV to simd_mod_imm
Alex Bennée
1
-10
/
+25
2018-03-01
arm/translate-a64: add FP16 FRSQRTE to simd_two_reg_misc_fp16
Alex Bennée
1
-0
/
+7
2018-03-01
arm/helper.c: re-factor rsqrte and add rsqrte_f16
Alex Bennée
2
-118
/
+104
2018-03-01
arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16
Alex Bennée
3
-0
/
+19
2018-03-01
arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16
Alex Bennée
3
-0
/
+34
2018-03-01
arm/translate-a64: add FP16 FRECPE
Alex Bennée
1
-0
/
+8
2018-03-01
arm/helper.c: re-factor recpe and add recepe_f16
Alex Bennée
2
-97
/
+128
2018-03-01
arm/translate-a64: add FP16 FNEG/FABS to simd_two_reg_misc_fp16
Alex Bennée
1
-1
/
+15
2018-03-01
arm/translate-a64: add FP16 SCVTF/UCVFT to simd_two_reg_misc_fp16
Alex Bennée
3
-24
/
+104
2018-03-01
arm/translate-a64: add FP16 FCMxx (zero) to simd_two_reg_misc_fp16
Alex Bennée
1
-23
/
+57
2018-03-01
arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16
Alex Bennée
3
-1
/
+118
2018-03-01
arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16
Alex Bennée
3
-5
/
+142
2018-03-01
arm/translate-a64: initial decode for simd_two_reg_misc_fp16
Alex Bennée
1
-0
/
+40
2018-03-01
arm/translate-a64: add FP16 x2 ops for simd_indexed
Alex Bennée
3
-6
/
+76
2018-03-01
arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed
Alex Bennée
1
-16
/
+66
2018-03-01
arm/translate-a64: add FP16 pairwise ops simd_three_reg_same_fp16
Alex Bennée
1
-75
/
+133
2018-03-01
arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16
Alex Bennée
3
-0
/
+42
2018-03-01
arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16
Alex Bennée
3
-0
/
+41
2018-03-01
arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16
Alex Bennée
3
-0
/
+69
2018-03-01
arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16
Alex Bennée
3
-0
/
+36
2018-03-01
arm/translate-a64: initial decode for simd_three_reg_same_fp16
Alex Bennée
1
-0
/
+73
2018-03-01
arm/translate-a64: handle_3same_64 comment fix
Alex Bennée
1
-2
/
+1
2018-03-01
arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)
Alex Bennée
3
-54
/
+110
2018-03-01
target/arm/helper: pass explicit fpst to set_rmode
Alex Bennée
4
-22
/
+22
2018-03-01
target/arm/cpu.h: add additional float_status flags
Alex Bennée
3
-36
/
+75
2018-03-01
target/arm/cpu.h: update comment for half-precision values
Alex Bennée
1
-0
/
+1
2018-03-01
target/arm/cpu64: introduce ARM_V8_FP16 feature bit
Alex Bennée
1
-0
/
+1
2018-02-26
s390x: remove s390_get_memslot_count
Cornelia Huck
5
-24
/
+0
2018-02-26
s390x/sclp: remove memory hotplug support
David Hildenbrand
1
-1
/
+0
2018-02-26
s390x/cpumodel: document S390FeatDef.bit not applicable
Halil Pasic
1
-2
/
+6
2018-02-26
qmp: expose s390-specific CPU info
Viktor Mihajlovski
4
-40
/
+37
2018-02-26
s390x/tcg: add various alignment checks
David Hildenbrand
3
-9
/
+75
2018-02-26
s390x/tcg: fix disabling/enabling DAT
David Hildenbrand
3
-5
/
+14
2018-02-26
s390x/cpu: expose the guest crash information
Christian Borntraeger
4
-9
/
+58
2018-02-22
target/arm: Fix register definitions for VMIDR and VMPIDR
Peter Maydell
1
-4
/
+4
2018-02-21
target/*/cpu.h: remove softfloat.h
Alex Bennée
43
-26
/
+29
2018-02-19
mem: add share parameter to memory-backend-ram
Marcel Apfelbaum
1
-2
/
+2
2018-02-16
target/ppc: convert to TranslatorOps
Emilio G. Cota
1
-162
/
+167
2018-02-16
target/ppc: convert to DisasContextBase
Emilio G. Cota
3
-86
/
+91
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