riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-06-05	*: Add missing includes of tcg/tcg.h	Richard Henderson	2	-0/+4
2023-06-05	target/*: Add missing includes of tcg/debug-assert.h	Richard Henderson	4	-0/+4
2023-06-05	target/avr: Add missing includes of qemu/error-report.h	Richard Henderson	1	-0/+1
2023-05-30	target/arm: Explain why we need to select ARM_V7M	Fabiano Rosas	1	-0/+3
2023-05-30	target/arm: Explicitly select short-format FSR for M-profile	Peter Maydell	1	-2/+11
2023-05-28	target/ppc: Add POWER9 DD2.2 model	Nicholas Piggin	3	-3/+23
2023-05-28	target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF	Richard Henderson	1	-56/+22
2023-05-28	target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs	Nicholas Piggin	1	-3/+3
2023-05-28	spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall	Nicholas Piggin	2	-0/+13
2023-05-27	target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward	Nicholas Piggin	1	-7/+10
2023-05-27	target/ppc: Fix width of some 32-bit SPRs	Nicholas Piggin	6	-27/+27
2023-05-27	target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs	Richard Purdie	2	-13/+29
2023-05-26	Merge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging	Richard Henderson	10	-89/+87
2023-05-26	Hexagon: fix outdated `hex_new_*` comments	Matheus Tavares Bernardino	2	-15/+13
2023-05-26	target/hexagon/*.py: clean up used 'toss' and 'numregs' vars	Matheus Tavares Bernardino	7	-70/+70
2023-05-26	Hexagon (target/hexagon) Fix assignment to tmp registers	Marco Liebel	1	-4/+4
2023-05-26	target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system core...	Song Gao	1	-13/+26
2023-05-26	target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV	Song Gao	2	-3/+5
2023-05-25	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Richard Henderson	1	-0/+10
2023-05-25	target/i386: EPYC-Rome model without XSAVES	Maksim Davydov	1	-0/+10
2023-05-23	tcg: Remove DEBUG_DISAS	Richard Henderson	2	-4/+0
2023-05-23	qemu/atomic128: Split atomic16_read	Richard Henderson	1	-1/+1
2023-05-23	target/s390x: Always use cpu_atomic_cmpxchgl_be_mmu in do_csst	Richard Henderson	1	-7/+1
2023-05-23	target/s390x: Use cpu_{ld,st}*_mmu in do_csst	Richard Henderson	1	-39/+27
2023-05-23	accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu	Richard Henderson	2	-17/+5
2023-05-23	target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ	Richard Henderson	5	-91/+9
2023-05-23	target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ	Richard Henderson	5	-132/+11
2023-05-19	Revert "arm/kvm: add support for MTE"	Peter Maydell	5	-68/+4
2023-05-18	Merge tag 'pull-hex-20230518-1' of https://github.com/quic/qemu into staging	Richard Henderson	35	-421/+1646
2023-05-18	Hexagon (gdbstub): add HVX support	Taylor Simpson	3	-0/+76
2023-05-18	Hexagon (gdbstub): fix p3:0 read and write via stub	Brian Cain	1	-0/+16
2023-05-18	Hexagon: add core gdbstub xml data for LLDB	Matheus Tavares Bernardino	1	-1/+2
2023-05-18	Hexagon (decode): look for pkts with multiple insns at the same slot	Matheus Tavares Bernardino	1	-3/+27
2023-05-18	Hexagon (iclass): update J4_hintjumpr slot constraints	Matheus Tavares Bernardino	1	-2/+4
2023-05-18	Hexagon: list available CPUs with `-cpu help`	Matheus Tavares Bernardino	2	-0/+23
2023-05-18	Hexagon (target/hexagon/*.py): raise exception on reg parsing error	Matheus Tavares Bernardino	6	-63/+66
2023-05-18	target/hexagon: fix = vs. == mishap	Paolo Bonzini	2	-3/+3
2023-05-18	Hexagon (target/hexagon) Additional instructions handled by idef-parser	Taylor Simpson	5	-41/+71
2023-05-18	Hexagon (target/hexagon) Move items to DisasContext	Taylor Simpson	8	-31/+21
2023-05-18	Hexagon (target/hexagon) Move pkt_has_store_s1 to DisasContext	Taylor Simpson	11	-40/+51
2023-05-18	Hexagon (target/hexagon) Move pred_written to DisasContext	Taylor Simpson	6	-12/+10
2023-05-18	Hexagon (target/hexagon) Move new_pred_value to DisasContext	Taylor Simpson	8	-24/+23
2023-05-18	Hexagon (target/hexagon) Move new_value to DisasContext	Taylor Simpson	4	-14/+9
2023-05-18	Hexagon (target/hexagon) Make special new_value for USR	Taylor Simpson	8	-12/+27
2023-05-18	Hexagon (target/hexagon) Add overrides for disabled idef-parser insns	Taylor Simpson	2	-0/+117
2023-05-18	Hexagon (target/hexagon) Short-circuit more HVX single instruction packets	Taylor Simpson	4	-2/+44
2023-05-18	Hexagon (target/hexagon) Short-circuit packet HVX writes	Taylor Simpson	2	-2/+50
2023-05-18	Hexagon (target/hexagon) Short-circuit packet predicate writes	Taylor Simpson	3	-6/+24
2023-05-18	Hexagon (target/hexagon) Short-circuit packet register writes	Taylor Simpson	16	-30/+128
2023-05-18	Hexagon (target/hexagon) Mark registers as read during packet analysis	Taylor Simpson	5	-15/+97