riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-06-29	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Richard Henderson	2	-12/+101
2023-06-29	target/i386: emulate 64-bit ring 0 for linux-user if LM feature is set	Paolo Bonzini	2	-4/+17
2023-06-29	target/i386: ignore CPL0-specific features in user mode emulation	Paolo Bonzini	1	-7/+76
2023-06-29	target/i386: ignore ARCH_CAPABILITIES features in user mode emulation	Paolo Bonzini	1	-0/+7
2023-06-29	target/i386: Export MSR_ARCH_CAPABILITIES bits to guests	Pawan Gupta	1	-2/+2
2023-06-29	Merge tag 'accel-20230628' of https://github.com/philmd/qemu into staging	Richard Henderson	28	-515/+468
2023-06-28	exec/memory: Add symbol for the min value of memory listener priority	Isaku Yamahata	1	-0/+1
2023-06-28	exec/memory: Add symbolic value for memory listener priority for accel	Isaku Yamahata	3	-3/+3
2023-06-28	target/i386/WHPX: Fix error message when fail to set ProcessorCount	Zhao Liu	1	-2/+2
2023-06-28	target/riscv: Restrict KVM-specific fields from ArchCPU	Philippe Mathieu-Daudé	3	-3/+9
2023-06-28	target/ppc: Restrict KVM-specific fields from ArchCPU	Philippe Mathieu-Daudé	2	-0/+6
2023-06-28	target/arm: Restrict KVM-specific fields from ArchCPU	Philippe Mathieu-Daudé	1	-0/+2
2023-06-28	hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers	Philippe Mathieu-Daudé	1	-45/+0
2023-06-28	accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState	Philippe Mathieu-Daudé	9	-287/+287
2023-06-28	accel: Rename 'cpu_state' -> 'cs'	Philippe Mathieu-Daudé	2	-195/+195
2023-06-28	accel: Inline WHPX get_whpx_vcpu()	Philippe Mathieu-Daudé	1	-19/+10
2023-06-28	accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState	Philippe Mathieu-Daudé	1	-15/+15
2023-06-28	accel: Remove WHPX unreachable error path	Philippe Mathieu-Daudé	1	-6/+0
2023-06-28	accel: Inline NVMM get_qemu_vcpu()	Philippe Mathieu-Daudé	1	-17/+11
2023-06-28	accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState	Philippe Mathieu-Daudé	1	-16/+16
2023-06-28	accel: Remove NVMM unreachable error path	Philippe Mathieu-Daudé	1	-4/+0
2023-06-28	accel: Move HAX hThread to accelerator context	Philippe Mathieu-Daudé	4	-3/+6
2023-06-28	accel: Rename HAX 'struct hax_vcpu_state' -> AccelCPUState	Philippe Mathieu-Daudé	6	-18/+19
2023-06-28	accel: Rename 'hax_vcpu' as 'accel' in CPUState	Philippe Mathieu-Daudé	4	-16/+16
2023-06-28	accel: Destroy HAX vCPU threads once done	Philippe Mathieu-Daudé	2	-0/+4
2023-06-28	accel: Fix a leak on Windows HAX	Philippe Mathieu-Daudé	1	-0/+3
2023-06-28	accel: Remove unused hThread variable on TCG/WHPX	Philippe Mathieu-Daudé	1	-3/+0
2023-06-28	accel: Re-enable WHPX cross-build on case sensitive filesystems	Philippe Mathieu-Daudé	2	-4/+4
2023-06-28	target/sparc: Use tcg_gen_lookup_and_goto_ptr for v9 WRASI	Richard Henderson	1	-2/+6
2023-06-28	target/sparc: Use DYNAMIC_PC_LOOKUP for v9 RETURN	Richard Henderson	1	-1/+1
2023-06-28	target/sparc: Use DYNAMIC_PC_LOOKUP for JMPL	Richard Henderson	1	-1/+1
2023-06-28	target/sparc: Use DYNAMIC_PC_LOOKUP for conditional branches	Richard Henderson	1	-3/+3
2023-06-28	target/sparc: Introduce DYNAMIC_PC_LOOKUP	Richard Henderson	1	-44/+103
2023-06-28	target/sparc: Drop inline markers from translate.c	Richard Henderson	1	-126/+111
2023-06-28	target/sparc: Fix npc comparison in sparc_tr_insn_start	Richard Henderson	1	-1/+1
2023-06-28	target/sparc: Use tcg_gen_lookup_and_goto_ptr in gen_goto_tb	Richard Henderson	1	-2/+2
2023-06-26	target/microblaze: Define TCG_GUEST_DEFAULT_MO	Richard Henderson	1	-0/+3
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	24	-54/+50
2023-06-26	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Richard Henderson	7	-37/+90
2023-06-26	target/i386: implement SYSCALL/SYSRET in 32-bit emulators	Paolo Bonzini	6	-13/+11
2023-06-26	target/i386: implement RDPID in TCG	Paolo Bonzini	4	-13/+44
2023-06-26	target/i386: sysret and sysexit are privileged	Paolo Bonzini	1	-2/+2
2023-06-26	target/i386: AMD only supports SYSENTER/SYSEXIT in 32-bit mode	Paolo Bonzini	1	-4/+6
2023-06-26	target/i386: Intel only supports SYSCALL/SYSRET in long mode	Paolo Bonzini	2	-1/+12
2023-06-26	target/i386: TCG supports WBNOINVD	Paolo Bonzini	2	-2/+3
2023-06-26	target/i386: TCG supports XSAVEERPTR	Paolo Bonzini	1	-1/+3
2023-06-26	target/i386: do not accept RDSEED if CPUID bit absent	Paolo Bonzini	1	-0/+8
2023-06-26	target/i386: TCG supports RDSEED	Paolo Bonzini	1	-3/+2
2023-06-26	target/i386: TCG supports 3DNow! prefetch(w)	Paolo Bonzini	1	-1/+2
2023-06-26	target/i386: fix INVD vmexit	Paolo Bonzini	1	-1/+1