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2023-04-28s390x/gdb: Split s390-virt.xmlIlya Leoshkevich1-20/+45
2023-04-23tcg: Replace tcg_abort with g_assert_not_reachedRichard Henderson2-12/+12
2023-04-22Merge tag 'pull-hex-20230421' of https://github.com/quic/qemu into stagingRichard Henderson24-1193/+1428
2023-04-22Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson3-3/+7
2023-04-21Hexagon (target/hexagon) Add overrides for cache/sync/barrier instructionsTaylor Simpson2-14/+28
2023-04-21Hexagon (target/hexagon) Remove unused slot variable in helpersTaylor Simpson4-11/+9
2023-04-21Hexagon (target/hexagon) Updates to USR should use get_result_gprTaylor Simpson6-44/+34
2023-04-21Hexagon (target/hexagon) Add overrides for count trailing zeros/onesTaylor Simpson1-0/+24
2023-04-21Hexagon (target/hexagon) Merge arguments to probe_pkt_scalar_hvx_storesTaylor Simpson4-9/+10
2023-04-21Hexagon (target/hexagon) Remove redundant/unused macrosTaylor Simpson1-43/+22
2023-04-21Use black code style for python scriptsMarco Liebel13-911/+1191
2023-04-21Use f-strings in python scriptsMarco Liebel12-306/+250
2023-04-21Hexagon (translate.c): avoid redundant PC updates on COFMatheus Tavares Bernardino1-8/+13
2023-04-21Merge tag 'pull-request-2023-04-20' of https://gitlab.com/thuth/qemu into sta...Richard Henderson1-9/+22
2023-04-20target/i386: Set family/model/stepping of the "max" CPU according to LM bitThomas Huth1-9/+22
2023-04-20target/arm: Report pauth information to gdb as 'pauth_v2'Peter Maydell1-5/+4
2023-04-20target/arm: Implement FEAT_PAN3Peter Maydell3-2/+19
2023-04-20target/arm: Don't set ISV when reporting stage 1 faults in ESR_EL2Peter Maydell1-3/+10
2023-04-20target/arm: Pass ARMMMUFaultInfo to merge_syn_data_abort()Peter Maydell1-8/+7
2023-04-20target/arm: Initialize debug capabilities only onceAkihiko Odaki3-14/+14
2023-04-20target/arm: Remove KVM AArch32 CPU definitionsPhilippe Mathieu-Daudé2-8/+3
2023-04-20target/i386: Change wrong XFRM value in SGX CPUID leafYang Zhong1-2/+2
2023-04-20target/mips: tcg: detect out-of-bounds accesses to cpu_gpr and cpu_gpr_hiPaolo Bonzini1-0/+4
2023-04-20target/i386: Avoid unreachable variable declaration in mmu_translate()Peter Maydell1-1/+1
2023-04-10target/arm: Copy guarded bit in combine_cacheattrsRichard Henderson1-0/+1
2023-04-10target/arm: PTE bit GP only applies to stage1Richard Henderson1-5/+5
2023-04-09target/ppc: Fix temp usage in gen_op_arith_modwRichard Henderson1-2/+2
2023-04-04Merge tag 'pull-loongarch-20230404' of https://gitlab.com/gaosong/qemu into s...Peter Maydell1-1/+1
2023-04-04target/loongarch: Enables plugins to get instruction codestanhongze1-1/+1
2023-04-03target/arm: Fix generated code for cpreg reads when HSTR is activePeter Maydell1-0/+6
2023-04-03target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()Philippe Mathieu-Daudé3-24/+16
2023-03-28softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accelPhilippe Mathieu-Daudé3-0/+3
2023-03-28target/arm/gdbstub: Only advertise M-profile features if TCG availablePhilippe Mathieu-Daudé1-2/+3
2023-03-24target/ppc: Fix helper_pminsn() prototypeCédric Le Goater1-1/+1
2023-03-24target/s390x: Fix float_comp_to_cc() prototypeCédric Le Goater1-1/+2
2023-03-22*: Add missing includes of qemu/error-report.hRichard Henderson9-0/+10
2023-03-21target/arm: Don't advertise aarch64-pauth.xml to gdbPeter Maydell1-0/+7
2023-03-21target/arm: Add Neoverse-N1 registersChen Baozi1-0/+69
2023-03-20target/s390x/tcg/mem_helper: Remove bad assert() statementThomas Huth1-1/+0
2023-03-20target/s390x: Update do_unaligned_access() commentIlya Leoshkevich1-2/+2
2023-03-20target/s390x: Handle STGRL to non-aligned addressesIlya Leoshkevich2-5/+6
2023-03-20target/s390x: Handle STRL to non-aligned addressesIlya Leoshkevich2-7/+8
2023-03-20target/s390x: Handle CLRL and CLGFRL with non-aligned addressesIlya Leoshkevich1-1/+2
2023-03-20target/s390x: Handle CGRL and CLGRL with non-aligned addressesIlya Leoshkevich1-1/+2
2023-03-20target/s390x: Handle CRL and CGFRL with non-aligned addressesIlya Leoshkevich1-1/+2
2023-03-20target/s390x: Handle LLGFRL from non-aligned addressesIlya Leoshkevich2-4/+5
2023-03-20target/s390x: Handle LRL and LGFRL from non-aligned addressesIlya Leoshkevich2-8/+9
2023-03-20target/s390x: Handle LGRL from non-aligned addressesIlya Leoshkevich2-4/+5
2023-03-20target/s390x: Handle EXECUTE of odd addressesIlya Leoshkevich1-2/+10
2023-03-20target/s390x: Handle branching to odd addressesIlya Leoshkevich1-0/+9