aboutsummaryrefslogtreecommitdiff
path: root/target
AgeCommit message (Expand)AuthorFilesLines
2020-03-05RISC-V: Add a missing "," in riscv_excp_namesPalmer Dabbelt1-2/+2
2020-03-05target/arm: Clean address for DC ZVARichard Henderson1-1/+1
2020-03-05target/arm: Use DEF_HELPER_FLAGS for helper_dc_zvaRichard Henderson1-1/+1
2020-03-05target/arm: Move helper_dc_zva to helper-a64.cRichard Henderson4-94/+92
2020-03-05target/arm: Apply TBI to ESR_ELx in helper_exception_returnRichard Henderson1-1/+22
2020-03-05target/arm: Introduce core_to_aa64_mmu_idxRichard Henderson2-1/+7
2020-03-05target/arm: Optimize cpu_mmu_indexRichard Henderson2-15/+13
2020-03-05target/arm: Replicate TBI/TBID bits for single range regimesRichard Henderson1-2/+4
2020-03-05target/arm: Honor the HCR_EL2.TTLB bitRichard Henderson1-30/+55
2020-03-05target/arm: Honor the HCR_EL2.TPU bitRichard Henderson1-20/+31
2020-03-05target/arm: Honor the HCR_EL2.TPCP bitRichard Henderson1-8/+31
2020-03-05target/arm: Honor the HCR_EL2.TACR bitRichard Henderson1-4/+14
2020-03-05target/arm: Honor the HCR_EL2.TSW bitRichard Henderson1-6/+16
2020-03-05target/arm: Honor the HCR_EL2.{TVM,TRVM} bitsRichard Henderson1-27/+55
2020-03-05target/arm: Improve masking in arm_hcr_el2_effRichard Henderson1-4/+27
2020-03-05target/arm: Remove EL2 and EL3 setup from user-onlyRichard Henderson1-6/+0
2020-03-05target/arm: Disable has_el2 and has_el3 for user-onlyRichard Henderson1-2/+4
2020-03-05target/arm: Add HCR_EL2 bit definitions from ARMv8.6Richard Henderson1-0/+7
2020-03-05target/arm: Improve masking of HCR/HCR2 RES0 bitsRichard Henderson1-13/+25
2020-03-05target/arm: Implement (trivially) ARMv8.2-TTCNPPeter Maydell3-0/+7
2020-03-03Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf3' i...Peter Maydell10-133/+1223
2020-02-28target/arm: Implement ARMv8.3-CCIDXPeter Maydell2-1/+35
2020-02-28target/arm: Implement v8.4-RCPCPeter Maydell3-1/+96
2020-02-28target/arm: Implement v8.3-RCPCPeter Maydell3-0/+30
2020-02-28target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0Peter Maydell1-2/+2
2020-02-28target/arm: Split VMINMAXNM decodeRichard Henderson2-77/+44
2020-02-28target/arm: Split VFM decodeRichard Henderson2-14/+55
2020-02-28target/arm: Add formats for some vfp 2 and 3-register insnsRichard Henderson1-90/+60
2020-02-28target/arm: Remove ARM_FEATURE_VFP*Richard Henderson5-37/+0
2020-02-28target/arm: Move the vfp decodetree calls next to the base isaRichard Henderson1-54/+29
2020-02-28target/arm: Move VLLDM and VLSTM to vfp.decodeRichard Henderson3-44/+50
2020-02-28target/arm: Remove ARM_FEATURE_VFP check from disas_vfp_insnRichard Henderson1-4/+0
2020-02-28target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmacRichard Henderson4-6/+36
2020-02-28target/arm: Add missing checks for fpsp_v2Richard Henderson1-9/+69
2020-02-28target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3Richard Henderson1-16/+8
2020-02-28target/arm: Perform fpdp_v2 check firstRichard Henderson1-69/+71
2020-02-28target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfpRichard Henderson3-5/+20
2020-02-28target/arm: Add isar_feature_aa32_{fpsp_v2, fpsp_v3, fpdp_v3}Richard Henderson1-0/+18
2020-02-28target/arm: Rename isar_feature_aa32_fpdp_v2Richard Henderson2-22/+22
2020-02-28target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson5-14/+25
2020-02-28target/arm: Set ID_MMFR4.HPDS for aarch64_max_initfnRichard Henderson1-0/+1
2020-02-27target/riscv: Emulate TIME CSRs for privileged modeAnup Patel3-4/+92
2020-02-27target/riscv: Allow enabling the Hypervisor extensionAlistair Francis2-0/+6
2020-02-27target/riscv: Add the MSTATUS_MPV_ISSET helper macroAlistair Francis4-4/+15
2020-02-27target/riscv: Add support for the 32-bit MSTATUSH CSRAlistair Francis6-0/+62
2020-02-27target/riscv: Set htval and mtval2 on execptionsAlistair Francis1-0/+10
2020-02-27target/riscv: Raise the new execptions when 2nd stage translation failsAlistair Francis1-6/+18
2020-02-27target/riscv: Implement second stage MMUAlistair Francis2-19/+175
2020-02-27target/riscv: Allow specifying MMU stageAlistair Francis1-9/+28
2020-02-27target/riscv: Respect MPRV and SPRV for floating point opsAlistair Francis1-1/+15