riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-09-07	target/riscv: rvv: Add mask agnostic for vector integer comparison instructions	Yueh-Ting (eop) Chen	2	-0/+11
2022-09-07	target/riscv: rvv: Add mask agnostic for vector integer shift instructions	Yueh-Ting (eop) Chen	2	-0/+8
2022-09-07	target/riscv: rvv: Add mask agnostic for vx instructions	Yueh-Ting (eop) Chen	2	-0/+5
2022-09-07	target/riscv: rvv: Add mask agnostic for vector load / store instructions	Yueh-Ting (eop) Chen	2	-11/+29
2022-09-07	target/riscv: rvv: Add mask agnostic for vv instructions	Yueh-Ting (eop) Chen	6	-2/+20
2022-09-07	target/riscv: Fix typo and restore Pointer Masking functionality for RISC-V	Alexey Baturo	1	-1/+1
2022-09-07	target/riscv: Simplify the check in hmode to reuse the check in riscv_csrrw_c...	Weiwei Li	1	-13/+5
2022-09-07	target/riscv: Fix checks in hmode/hmode32	Weiwei Li	2	-7/+7
2022-09-07	target/riscv: Add check for csrs existed with U extension	Weiwei Li	1	-3/+21
2022-09-07	target/riscv: Fix checkpatch warning may triggered in csr_ops table	Weiwei Li	1	-207/+234
2022-09-07	target/riscv: H extension depends on I extension	Weiwei Li	1	-0/+6
2022-09-07	target/riscv: Add check for supported privilege mode combinations	Weiwei Li	1	-0/+6
2022-09-07	target/riscv: move zmmul out of the experimental properties	Weiwei Li	1	-1/+2
2022-09-07	target/riscv: fix shifts shamt value for rv128c	Frédéric Pétrot	2	-5/+22
2022-09-07	target/riscv: Force disable extensions if priv spec version does not match	Anup Patel	1	-56/+94
2022-09-07	target/riscv: Update [m\|h]tinst CSR in riscv_cpu_do_interrupt()	Anup Patel	3	-6/+296
2022-09-06	target/riscv: Make translator stop before the end of a page	Richard Henderson	1	-4/+13
2022-09-06	target/riscv: Add MAX_INSN_LEN and insn_len	Richard Henderson	1	-1/+9
2022-09-06	target/i386: Make translator stop before the end of a page	Ilya Leoshkevich	1	-24/+38
2022-09-06	target/s390x: Make translator stop before the end of a page	Ilya Leoshkevich	1	-4/+11
2022-09-06	accel/tcg: Add pc and host_pc params to gen_intermediate_code	Richard Henderson	21	-42/+68
2022-09-06	accel/tcg: Remove translator_ldsw	Richard Henderson	1	-1/+1
2022-09-04	target/openrisc: Interrupt handling fixes	Stafford Horne	2	-1/+7
2022-09-04	target/openrisc: Enable MTTCG	Stafford Horne	2	-1/+8
2022-09-04	target/openrisc: Add interrupted CPU to log	Stafford Horne	1	-1/+3
2022-09-04	target/openrisc: Fix memory reading in debugger	Stafford Horne	1	-1/+7
2022-09-02	Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging	Stefan Hajnoczi	5	-1329/+1465
2022-09-01	Merge tag 'pull-avr-20220901' of https://gitlab.com/rth7680/qemu into staging	Stefan Hajnoczi	2	-30/+65
2022-09-01	target/i386: AVX+AES helpers prep	Paul Brook	1	-19/+22
2022-09-01	target/i386: AVX pclmulqdq prep	Paul Brook	1	-7/+22
2022-09-01	target/i386: Rewrite blendv helpers	Paul Brook	1	-62/+24
2022-09-01	target/i386: Misc AVX helper prep	Paul Brook	1	-49/+94
2022-09-01	target/i386: Destructive FP helpers for AVX	Paul Brook	1	-58/+43
2022-09-01	target/i386: Dot product AVX helper prep	Paul Brook	1	-35/+45
2022-09-01	target/i386: reimplement AVX comparison helpers	Paul Brook	3	-69/+78
2022-09-01	target/i386: Floating point arithmetic helper AVX prep	Paul Brook	1	-41/+87
2022-09-01	target/i386: Destructive vector helpers for AVX	Paul Brook	1	-301/+269
2022-09-01	target/i386: Misc integer AVX helper prep	Paul Brook	1	-86/+82
2022-09-01	target/i386: Rewrite simple integer vector helpers	Paul Brook	1	-54/+27
2022-09-01	target/i386: Rewrite vector shift helper	Paul Brook	1	-131/+108
2022-09-01	target/i386: rewrite destructive 3DNow operations	Paolo Bonzini	1	-16/+16
2022-09-01	target/i386: Add CHECK_NO_VEX	Paul Brook	1	-0/+26
2022-09-01	target/i386: do not cast gen_helper_* function pointers	Paolo Bonzini	1	-38/+37
2022-09-01	target/i386: Add size suffix to vector FP helpers	Paolo Bonzini	3	-66/+67
2022-09-01	target/i386: isolate MMX code more	Paolo Bonzini	1	-18/+32
2022-09-01	target/i386: check SSE table flags instead of hardcoding opcodes	Paolo Bonzini	1	-44/+31
2022-09-01	target/i386: Move 3DNOW decoder	Paul Brook	1	-13/+17
2022-09-01	target/i386: Rework sse_op_table6/7	Paul Brook	1	-100/+132
2022-09-01	target/i386: Rework sse_op_table1	Paul Brook	1	-130/+183
2022-09-01	target/i386: Add ZMM_OFFSET macro	Paul Brook	1	-33/+27