riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-05-19	target/i386: Reduce DisasContext.override to int8_t	Richard Henderson	1	-1/+1
2021-05-19	target/i386: Reduce DisasContext.flags to uint32_t	Richard Henderson	1	-1/+1
2021-05-19	target/i386: Remove DisasContext.f_st as unused	Richard Henderson	1	-2/+0
2021-05-19	target/i386: Move rex_w into DisasContext	Richard Henderson	1	-7/+9
2021-05-19	target/i386: Move rex_r into DisasContext	Richard Henderson	1	-39/+45
2021-05-19	target/i386: Tidy REX_B, REX_X definition	Richard Henderson	1	-10/+7
2021-05-19	target/i386: Introduce REX_PREFIX	Richard Henderson	1	-18/+11
2021-05-19	target/i386: Assert !ADDSEG for x86_64 user-only	Richard Henderson	1	-5/+6
2021-05-19	target/i386: Assert LMA for x86_64 user-only	Richard Henderson	1	-5/+5
2021-05-19	target/i386: Assert CODE64 for x86_64 user-only	Richard Henderson	1	-4/+8
2021-05-19	target/i386: Assert SS32 for x86_64 user-only	Richard Henderson	1	-7/+8
2021-05-19	target/i386: Assert CODE32 for x86_64 user-only	Richard Henderson	1	-6/+7
2021-05-19	target/i386: Assert !VM86 for x86_64 user-only	Richard Henderson	1	-18/+22
2021-05-19	target/i386: Assert IOPL is 0 for user-only	Richard Henderson	1	-6/+10
2021-05-19	target/i386: Assert CPL is 3 for user-only	Richard Henderson	1	-11/+21
2021-05-19	target/i386: Assert PE is set for user-only	Richard Henderson	1	-33/+36
2021-05-19	target/i386: Split out check_iopl	Richard Henderson	1	-15/+13
2021-05-19	target/i386: Split out check_vm86_iopl	Richard Henderson	1	-11/+14
2021-05-19	target/i386: Unify code paths for IRET	Richard Henderson	1	-10/+6
2021-05-19	target/i386: Split out check_cpl0	Richard Henderson	1	-49/+30
2021-05-19	target/i386: Split out gen_exception_gpf	Richard Henderson	1	-31/+37
2021-05-17	Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fp-20210516' into ...	Peter Maydell	1	-2/+8
2021-05-17	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...	Peter Maydell	2	-7/+6
2021-05-16	target/mips: Set set_default_nan_mode with set_snan_bit_is_one	Richard Henderson	1	-2/+8
2021-05-14	Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20210513a'...	Peter Maydell	2	-10/+13
2021-05-13	Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into ...	Peter Maydell	37	-7613/+0
2021-05-13	numa: Teach ram block notifiers about resizeable ram blocks	David Hildenbrand	2	-10/+13
2021-05-13	target/avr: Ignore unimplemented WDR opcode	Philippe Mathieu-Daudé	1	-5/+1
2021-05-13	target/sh4: Return error if CPUClass::get_phys_page_debug() fails	Philippe Mathieu-Daudé	1	-2/+5
2021-05-12	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210...	Peter Maydell	29	-759/+1096
2021-05-12	Drop the deprecated unicore32 target	Markus Armbruster	12	-3587/+0
2021-05-12	Drop the deprecated lm32 target	Markus Armbruster	15	-2622/+0
2021-05-12	Remove the deprecated moxie target	Thomas Huth	12	-1404/+0
2021-05-11	target/riscv: Fix the RV64H decode comment	Alistair Francis	1	-1/+1
2021-05-11	target/riscv: Consolidate RV32/64 16-bit instructions	Alistair Francis	5	-72/+39
2021-05-11	target/riscv: Consolidate RV32/64 32-bit instructions	Alistair Francis	14	-150/+166
2021-05-11	target/riscv: Remove an unused CASE_OP_32_64 macro	Alistair Francis	1	-6/+0
2021-05-11	target/riscv: Remove the unused HSTATUS_WPRI macro	Alistair Francis	1	-6/+0
2021-05-11	target/riscv: Remove the hardcoded SATP_MODE macro	Alistair Francis	4	-28/+56
2021-05-11	target/riscv: Remove the hardcoded MSTATUS_SD macro	Alistair Francis	3	-14/+27
2021-05-11	target/riscv: Remove the hardcoded HGATP_MODE macro	Alistair Francis	2	-20/+15
2021-05-11	target/riscv: Remove the hardcoded SSTATUS_SD macro	Alistair Francis	2	-7/+8
2021-05-11	target/riscv: Remove the hardcoded RVXLEN macro	Alistair Francis	2	-7/+5
2021-05-11	target/riscv: fix a typo with interrupt names	Emmanuel Blot	1	-1/+1
2021-05-11	target/riscv: fix exception index on instruction access fault	Emmanuel Blot	1	-1/+3
2021-05-11	target/riscv: fix vrgather macro index variable type bug	Frank Chang	1	-2/+4
2021-05-11	target/riscv: Add ePMP support for the Ibex CPU	Alistair Francis	1	-0/+1
2021-05-11	target/riscv/pmp: Remove outdated comment	Alistair Francis	1	-4/+0
2021-05-11	target/riscv: Add a config option for ePMP	Hou Weiying	2	-0/+11
2021-05-11	target/riscv: Implementation of enhanced PMP (ePMP)	Hou Weiying	1	-8/+146