riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-10-20	s390x/tcg: take care of external interrupt subclasses	David Hildenbrand	4	-13/+50
2017-10-20	s390x/tcg: rework checking for deliverable interrupts	David Hildenbrand	4	-17/+62
2017-10-20	s390x/tcg: injection of emergency signals and external calls	David Hildenbrand	4	-2/+50
2017-10-20	s390x/tcg: cleanup service interrupt injection	David Hildenbrand	5	-38/+10
2017-10-20	s390x/tcg: turn INTERRUPT_EXT into a mask	David Hildenbrand	5	-47/+61
2017-10-20	S390: use g_new() family of functions	Marc-André Lureau	2	-7/+7
2017-10-19	Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging	Peter Maydell	3	-110/+149
2017-10-19	Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20171018' int...	Peter Maydell	3	-3/+15
2017-10-17	ppc: spapr: use generic cpu_model parsing	Igor Mammedov	3	-5/+9
2017-10-17	ppc: move ppc_cpu_lookup_alias() before its first user	Igor Mammedov	1	-13/+13
2017-10-17	ppc: spapr: register 'host' core type along with the rest of core types	Igor Mammedov	1	-11/+0
2017-10-17	ppc: spapr: use cpu type name directly	Igor Mammedov	1	-1/+1
2017-10-17	ppc: move '-cpu foo,compat=xxx' parsing into ppc_cpu_parse_featurestr()	Igor Mammedov	2	-0/+58
2017-10-17	target/ppc: Fix carry flag setting for shift algebraic instructions	Sandipan Das	2	-8/+20
2017-10-17	target/ppc: Add POWER9 DD2.0 model information	David Gibson	2	-2/+5
2017-10-17	target/ppc: Remove unused PPC 460 and 460F definitions	Thomas Huth	1	-217/+0
2017-10-16	target/i386: trap on instructions longer than >15 bytes	Paolo Bonzini	1	-7/+22
2017-10-16	target/i386: introduce x86_ld*_code	Paolo Bonzini	1	-103/+125
2017-10-16	nios2: define tcg_env	Paolo Bonzini	1	-0/+1
2017-10-16	build: remove CONFIG_LIBDECNUMBER	Paolo Bonzini	1	-0/+1
2017-10-16	linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31	Richard Henderson	1	-1/+5
2017-10-16	linux-user: Tidy and enforce reserved_va initialization	Richard Henderson	2	-2/+10
2017-10-12	target/arm: Implement SG instruction corner cases	Peter Maydell	1	-1/+22
2017-10-12	target/arm: Support some Thumb insns being always unconditional	Peter Maydell	1	-1/+47
2017-10-12	target-arm: Simplify insn_crosses_page()	Peter Maydell	1	-21/+6
2017-10-12	target/arm: Pull Thumb insn word loads up to top level	Peter Maydell	1	-70/+108
2017-10-12	target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1	Peter Maydell	1	-2/+1
2017-10-12	target/arm: Implement secure function return	Peter Maydell	3	-10/+126
2017-10-12	target/arm: Implement BLXNS	Peter Maydell	4	-2/+76
2017-10-12	target/arm: Implement SG instruction	Peter Maydell	1	-5/+127
2017-10-12	target/arm: Add M profile secure MMU index values to get_a32_user_mem_index()	Peter Maydell	1	-0/+4
2017-10-10	tcg: remove addr argument from lookup_tb_ptr	Emilio G. Cota	8	-27/+17
2017-10-09	x86: Correct translation of some rdgsbase and wrgsbase encodings	Todd Eisenberger	1	-2/+2
2017-10-09	qom/cpu: move cpu_model null check to cpu_class_by_name()	Philippe Mathieu-Daudé	13	-55/+2
2017-10-06	target/arm: Factor out "get mmuidx for specified security state"	Peter Maydell	1	-11/+21
2017-10-06	target/arm: Fix calculation of secure mm_idx values	Peter Maydell	1	-5/+7
2017-10-06	target/arm: Implement security attribute lookups for memory accesses	Peter Maydell	2	-2/+195
2017-10-06	nvic: Implement Security Attribution Unit registers	Peter Maydell	3	-0/+51
2017-10-06	target/arm: Add v8M support to exception entry code	Peter Maydell	1	-20/+145
2017-10-06	target/arm: Add support for restoring v8M additional state context	Peter Maydell	1	-0/+30
2017-10-06	target/arm: Update excret sanity checks for v8M	Peter Maydell	1	-15/+58
2017-10-06	target/arm: Add new-in-v8M SFSR and SFAR	Peter Maydell	2	-0/+14
2017-10-06	target/arm: Don't warn about exception return with PC low bit set for v8M	Peter Maydell	1	-7/+15
2017-10-06	target/arm: Warn about restoring to unaligned stack	Peter Maydell	1	-0/+7
2017-10-06	target/arm: Check for xPSR mismatch usage faults earlier for v8M	Peter Maydell	1	-3/+27
2017-10-06	target/arm: Restore SPSEL to correct CONTROL register on exception return	Peter Maydell	1	-13/+27
2017-10-06	target/arm: Restore security state on exception return	Peter Maydell	1	-0/+2
2017-10-06	target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode	Peter Maydell	2	-23/+50
2017-10-06	target/arm: Don't switch to target stack early in v7M exception return	Peter Maydell	1	-32/+98
2017-10-06	arm: Fix SMC reporting to EL2 when QEMU provides PSCI	Jan Kiszka	2	-11/+25