riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-09-30	target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML	Peter Maydell	1	-16/+40
2021-09-30	target/arm: Move gdbstub related code out of helper.c	Peter Maydell	4	-271/+277
2021-09-30	target/arm: Fix coding style issues in gdbstub code in helper.c	Peter Maydell	1	-7/+16
2021-09-30	arm: tcg: Adhere to SMCCC 1.3 section 5.2	Alexander Graf	1	-29/+6
2021-09-21	hw/core: Make do_unaligned_access noreturn	Richard Henderson	11	-20/+21
2021-09-21	include/exec: Move cpu_signal_handler declaration	Richard Henderson	21	-89/+0
2021-09-21	Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-202...	Richard Henderson	4	-20/+52
2021-09-21	target/arm: Optimize MVE 1op-immediate insns	Peter Maydell	1	-5/+21
2021-09-21	target/arm: Optimize MVE VSLI and VSRI	Peter Maydell	1	-2/+2
2021-09-21	target/arm: Optimize MVE VSHLL and VMOVL	Peter Maydell	1	-8/+59
2021-09-21	target/arm: Optimize MVE VSHL, VSHR immediate forms	Peter Maydell	1	-20/+63
2021-09-21	target/arm: Optimize MVE VMVN	Peter Maydell	1	-1/+1
2021-09-21	target/arm: Optimize MVE VDUP	Peter Maydell	1	-4/+8
2021-09-21	target/arm: Optimize MVE VNEG, VABS	Peter Maydell	1	-10/+22
2021-09-21	target/arm: Optimize MVE arithmetic ops	Peter Maydell	1	-9/+11
2021-09-21	target/arm: Optimize MVE logic ops	Peter Maydell	1	-15/+36
2021-09-21	target/arm: Add TB flag for "MVE insns not predicated"	Peter Maydell	7	-9/+92
2021-09-21	target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration	Peter Maydell	1	-0/+13
2021-09-21	target/arm: Avoid goto_tb if we're trying to exit to the main loop	Peter Maydell	1	-1/+33
2021-09-21	hvf: arm: Add rudimentary PMC support	Alexander Graf	1	-0/+179
2021-09-21	arm: Add Hypervisor.framework build target	Alexander Graf	2	-0/+5
2021-09-21	hvf: arm: Implement PSCI handling	Alexander Graf	3	-7/+139
2021-09-21	hvf: arm: Implement -cpu host	Peter Maydell	5	-6/+124
2021-09-21	arm/hvf: Add a WFI handler	Peter Collingbourne	1	-0/+79
2021-09-21	target/riscv: csr: Rename HCOUNTEREN_CY and friends	Bin Meng	2	-16/+16
2021-09-21	target/riscv: Backup/restore mstatus.SD bit when virtual register swapped	Frank Chang	1	-1/+2
2021-09-21	target/riscv: Expose interrupt pending bits as GPIO lines	Alistair Francis	1	-0/+30
2021-09-21	target/riscv: Fix satp write	LIU Zhiwei	1	-1/+1
2021-09-21	target/riscv: Update the ePMP CSR address	Alistair Francis	2	-2/+3
2021-09-20	hvf: Add Apple Silicon support	Alexander Graf	3	-0/+810
2021-09-20	hvf: Introduce hvf_arch_init() callback	Alexander Graf	1	-0/+5
2021-09-20	arm: Move PMC register definitions to internals.h	Alexander Graf	2	-44/+44
2021-09-20	target/arm: Consolidate ifdef blocks in reset	Peter Maydell	1	-12/+10
2021-09-20	target/arm: Always clear exclusive monitor on reset	Peter Maydell	1	-3/+3
2021-09-20	target/arm: Don't skip M-profile reset entirely in user mode	Peter Maydell	1	-0/+19
2021-09-16	Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-re...	Peter Maydell	2	-2/+2
2021-09-16	Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pul...	Peter Maydell	4	-8/+5
2021-09-16	target/sparc: Make sparc_cpu_dump_state() static	Philippe Mathieu-Daudé	2	-2/+1
2021-09-16	target/avr: Fix compiler errors (-Werror=enum-conversion)	Stefan Weil	1	-5/+3
2021-09-16	target/i386: spelling: occured=>occurred, mininum=>minimum	Michael Tokarev	1	-1/+1
2021-09-14	user: Remove cpu_get_pic_interrupt() stubs	Philippe Mathieu-Daudé	1	-1/+1
2021-09-14	target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	3	-8/+5
2021-09-14	target/rx: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	3	-1/+7
2021-09-14	target/sparc: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	1	-1/+3
2021-09-14	target/sh4: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	3	-10/+5
2021-09-14	target/riscv: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	3	-7/+2
2021-09-14	target/ppc: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	3	-21/+6
2021-09-14	target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	4	-7/+8
2021-09-14	target/nios2: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	1	-2/+3
2021-09-14	target/mips: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	5	-26/+22