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2023-02-08riscv: Clean up includesMarkus Armbruster1-1/+0
2023-02-08target/hexagon: Clean up includesMarkus Armbruster2-2/+0
2023-02-07target/riscv: fix SBI getchar handler for KVMVladimir Isaev1-2/+3
2023-02-07target/riscv: fix ctzw behaviorVladimir Isaev1-0/+1
2023-02-07target/riscv: fix for virtual instr exceptionDeepak Gupta1-0/+1
2023-02-07RISC-V: Adding XTheadFmv ISA extensionChristoph Müllner5-3/+55
2023-02-07RISC-V: Add initial support for T-Head C906Christoph Müllner3-0/+38
2023-02-07RISC-V: Set minimum priv version for Zfh to 1.11Christoph Müllner1-1/+1
2023-02-07RISC-V: Adding T-Head FMemIdx extensionChristoph Müllner5-1/+123
2023-02-07RISC-V: Adding T-Head MemIdx extensionChristoph Müllner5-1/+464
2023-02-07RISC-V: Adding T-Head MemPair extensionChristoph Müllner5-1/+109
2023-02-07RISC-V: Adding T-Head multiply-accumulate instructionsChristoph Müllner5-1/+96
2023-02-07RISC-V: Adding XTheadCondMov ISA extensionChristoph Müllner5-1/+43
2023-02-07RISC-V: Adding XTheadBs ISA extensionChristoph Müllner5-1/+23
2023-02-07RISC-V: Adding XTheadBb ISA extensionChristoph Müllner5-2/+149
2023-02-07RISC-V: Adding XTheadBa ISA extensionChristoph Müllner5-1/+66
2023-02-07RISC-V: Adding XTheadSync ISA extensionChristoph Müllner7-1/+105
2023-02-07RISC-V: Adding XTheadCmo ISA extensionChristoph Müllner6-0/+131
2023-02-07target/riscv: set tval for triggered watchpointsSergey Matyukevich2-1/+6
2023-02-07target/riscv: Ensure opcode is saved for all relevant instructionsAnup Patel7-3/+21
2023-02-07target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAXAnup Patel1-0/+24
2023-02-07target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIPAnup Patel2-6/+8
2023-02-07target/riscv: Update VS timer whenever htimedelta changesAnup Patel1-0/+16
2023-02-04Merge tag 'pull-tcg-20230204' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell15-771/+483
2023-02-04target/i386: Inline cmpxchg16bRichard Henderson3-78/+39
2023-02-04target/i386: Inline cmpxchg8bRichard Henderson3-64/+49
2023-02-04target/i386: Split out gen_cmpxchg8b, gen_cmpxchg16bRichard Henderson1-17/+31
2023-02-04target/s390x: Implement CC_OP_NZ in gen_op_calc_ccRichard Henderson1-0/+3
2023-02-04target/s390x: Use tcg_gen_atomic_cmpxchg_i128 for CDSGRichard Henderson4-78/+33
2023-02-04target/s390x: Use Int128 for passing float128Richard Henderson4-105/+121
2023-02-04target/s390x: Use Int128 for returning float128Richard Henderson4-59/+63
2023-02-04target/s390x: Copy wout_x1 to wout_x1_PRichard Henderson2-6/+14
2023-02-04target/s390x: Use Int128 for return from TRERichard Henderson3-7/+9
2023-02-04target/s390x: Use Int128 for return from CKSMRichard Henderson3-7/+8
2023-02-04target/s390x: Use Int128 for return from CLSTRichard Henderson3-10/+11
2023-02-04target/s390x: Use a single return for helper_divs64/u64Richard Henderson3-35/+21
2023-02-04target/s390x: Use a single return for helper_divs32/u32Richard Henderson3-18/+18
2023-02-04target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCXRichard Henderson3-101/+47
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for CASPRichard Henderson3-89/+19
2023-02-04target/arm: Use tcg_gen_atomic_cmpxchg_i128 for STXPRichard Henderson3-135/+35
2023-02-04Merge tag 'm68k-next-pull-request' of https://github.com/vivier/qemu-m68k int...Peter Maydell1-0/+4
2023-02-03target/arm: Enable FEAT_FGT on '-cpu max'Peter Maydell1-0/+1
2023-02-03target/arm: Implement MDCR_EL2.TDCC and MDCR_EL3.TDCC trapsPeter Maydell1-4/+31
2023-02-03target/arm: Implement the HFGITR_EL2.SVC_EL0 and SVC_EL1 trapsPeter Maydell5-4/+40
2023-02-03target/arm: Implement the HFGITR_EL2.ERET trapPeter Maydell5-0/+26
2023-02-03target/arm: Mark up sysregs for HFGITR bits 48..63Peter Maydell2-0/+13
2023-02-03target/arm: Mark up sysregs for HFGITR bits 18..47Peter Maydell2-0/+60
2023-02-03target/arm: Mark up sysregs for HFGITR bits 12..17Peter Maydell2-0/+12
2023-02-03target/arm: Mark up sysregs for HFGITR bits 0..11Peter Maydell2-0/+42
2023-02-03target/arm: Mark up sysregs for HDFGRTR bits 12..63Peter Maydell2-0/+49