Age | Commit message (Expand) | Author | Files | Lines |
2020-05-15 | accel/tcg: Relax va restrictions on 64-bit guests | Richard Henderson | 1 | -13/+2 |
2020-05-15 | target: Remove unnecessary CPU() cast | Philippe Mathieu-Daudé | 1 | -1/+1 |
2020-05-15 | qdev: Unrealize must not fail | Markus Armbruster | 2 | -14/+4 |
2020-05-15 | Drop more @errp parameters after previous commit | Markus Armbruster | 2 | -4/+2 |
2020-05-15 | qom: Drop parameter @errp of object_property_add() & friends | Markus Armbruster | 8 | -80/+65 |
2020-05-15 | s390x/cpumodel: Fix UI to CPU features pcc-cmac-{aes,eaes}-256 | Markus Armbruster | 1 | -1/+1 |
2020-05-15 | qom: Drop object_property_set_description() parameter @errp | Markus Armbruster | 5 | -9/+8 |
2020-05-14 | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200514'... | Peter Maydell | 18 | -1427/+2498 |
2020-05-14 | target/arm: Convert NEON VFMA, VFMS 3-reg-same insns to decodetree | Peter Maydell | 3 | -174/+46 |
2020-05-14 | target/arm: Convert Neon fp VMAX/VMIN/VMAXNM/VMINNM/VRECPS/VRSQRTS to decodetree | Peter Maydell | 3 | -40/+78 |
2020-05-14 | target/arm: Move 'env' argument of recps_f32 and rsqrts_f32 helpers to usual ... | Peter Maydell | 3 | -6/+6 |
2020-05-14 | target/arm: Convert Neon 3-reg-same compare insns to decodetree | Peter Maydell | 3 | -37/+13 |
2020-05-14 | target/arm: Convert Neon fp VMUL, VMLA, VMLS 3-reg-same insns to decodetree | Peter Maydell | 3 | -16/+85 |
2020-05-14 | target/arm: Convert Neon VPMIN/VPMAX/VPADD float 3-reg-same insns to decodetree | Peter Maydell | 3 | -55/+76 |
2020-05-14 | target/arm: Convert Neon VADD, VSUB, VABD 3-reg-same insns to decodetree | Peter Maydell | 6 | -15/+48 |
2020-05-14 | target/arm: Convert Neon VQDMULH/VQRDMULH 3-reg-same to decodetree | Peter Maydell | 3 | -23/+28 |
2020-05-14 | target/arm: Convert Neon VPADD 3-reg-same insns to decodetree | Peter Maydell | 3 | -18/+5 |
2020-05-14 | target/arm: Convert Neon VPMAX/VPMIN 3-reg-same insns to decodetree | Peter Maydell | 3 | -15/+82 |
2020-05-14 | target/arm: Convert Neon VQSHL, VRSHL, VQRSHL 3-reg-same insns to decodetree | Peter Maydell | 3 | -25/+70 |
2020-05-14 | target/arm: Convert Neon VRHADD, VHSUB 3-reg-same insns to decodetree | Peter Maydell | 3 | -6/+12 |
2020-05-14 | target/arm: Convert Neon VABA/VABD 3-reg-same to decodetree | Peter Maydell | 3 | -20/+12 |
2020-05-14 | target/arm: Convert Neon VHADD 3-reg-same insns | Peter Maydell | 3 | -3/+27 |
2020-05-14 | target/arm: Convert Neon 64-bit element 3-reg-same insns | Peter Maydell | 3 | -36/+39 |
2020-05-14 | target/arm: Convert Neon 3-reg-same SHA to decodetree | Peter Maydell | 3 | -44/+151 |
2020-05-14 | target/arm: Convert Neon 3-reg-same VQRDMLAH/VQRDMLSH to decodetree | Peter Maydell | 3 | -12/+20 |
2020-05-14 | target-arm: kvm64: handle SIGBUS signal from kernel or KVM | Dongjiu Geng | 6 | -4/+88 |
2020-05-14 | KVM: Move hwpoison page related functions into kvm-all.c | Dongjiu Geng | 1 | -36/+0 |
2020-05-14 | target/arm: Vectorize SABA/UABA | Richard Henderson | 6 | -33/+174 |
2020-05-14 | target/arm: Vectorize SABD/UABD | Richard Henderson | 5 | -4/+176 |
2020-05-14 | target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_* | Richard Henderson | 1 | -0/+2 |
2020-05-14 | target/arm: Pass pointer to qc to qrdmla/qrdmls | Richard Henderson | 2 | -34/+54 |
2020-05-14 | target/arm: Create gen_gvec_{qrdmla,qrdmls} | Richard Henderson | 3 | -58/+33 |
2020-05-14 | target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32 | Richard Henderson | 4 | -18/+8 |
2020-05-14 | target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} | Richard Henderson | 4 | -135/+147 |
2020-05-14 | target/arm: Create gen_gvec_{cmtst,ushl,sshl} | Richard Henderson | 4 | -102/+95 |
2020-05-14 | target/arm: Swap argument order for VSHL during decode | Richard Henderson | 2 | -4/+16 |
2020-05-14 | target/arm: Create gen_gvec_{mla,mls} | Richard Henderson | 4 | -73/+71 |
2020-05-14 | target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0 | Richard Henderson | 3 | -218/+74 |
2020-05-14 | target/arm: Tidy handle_vec_simd_shri | Richard Henderson | 1 | -42/+14 |
2020-05-14 | target/arm: Remove unnecessary range check for VSHL | Richard Henderson | 1 | -10/+2 |
2020-05-14 | target/arm: Create gen_gvec_{sri,sli} | Richard Henderson | 5 | -101/+160 |
2020-05-14 | target/arm: Create gen_gvec_{u,s}{rshr,rsra} | Richard Henderson | 5 | -26/+527 |
2020-05-14 | target/arm: Create gen_gvec_[us]sra | Richard Henderson | 5 | -79/+139 |
2020-05-14 | target/arm: Use correct GDB XML for M-profile cores | Peter Maydell | 2 | -4/+19 |
2020-05-14 | target/microblaze: monitor: Increase the number of registers reported | Joe Komlodi | 1 | -2/+14 |
2020-05-14 | target/microblaze: gdb: Fix incorrect SReg reporting | Joe Komlodi | 1 | -10/+49 |
2020-05-14 | target/microblaze: gdb: Extend the number of registers presented to GDB | Joe Komlodi | 2 | -4/+50 |
2020-05-14 | target/microblaze: Fix FPU2 instruction check | Joe Komlodi | 1 | -1/+1 |
2020-05-14 | target/microblaze: Add MFS Rd,EDR translation | Tong Ho | 1 | -0/+1 |
2020-05-11 | target/arm: Fix tcg_gen_gvec_dup_imm vs DUP (indexed) | Richard Henderson | 1 | -1/+5 |