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path: root/target/xtensa/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2019-01-24target/xtensa: fix access to the INTERRUPT SRMax Filippov1-0/+2
2019-01-13target/xtensa: move non-HELPER functions to helper.cMax Filippov1-56/+0
2019-01-13target/xtensa: drop dump_state helperMax Filippov1-11/+0
2019-01-13target/xtensa: extract interrupt and exception helpersMax Filippov1-93/+0
2019-01-13target/xtensa: extract debug helpersMax Filippov1-92/+0
2019-01-13target/xtensa: extract MMU helpersMax Filippov1-293/+0
2019-01-13target/xtensa: extract windowed registers helpersMax Filippov1-190/+0
2019-01-13target/xtensa: extract FPU helpersMax Filippov1-135/+0
2019-01-11target/xtensa: rework zero overhead loops implementationMax Filippov1-24/+0
2018-10-01target/xtensa: extract test for window underflow exceptionMax Filippov1-9/+15
2018-10-01target/xtensa: extract test for window overflow exceptionMax Filippov1-5/+0
2018-10-01target/xtensa: extract test for an illegal instructionMax Filippov1-37/+35
2018-09-17target/xtensa: convert to do_transaction_failedMax Filippov1-5/+7
2018-06-30xtensa: Avoid calling get_page_addr_code() from helper functionPeter Maydell1-1/+5
2018-06-28move public invalidate APIs out of translate-all.{c,h}, clean upPaolo Bonzini1-8/+1
2018-05-31Make tb_invalidate_phys_addr() take a MemTxAttrs argumentPeter Maydell1-1/+2
2018-04-11icount: fix cpu_restore_state_from_tb for non-tb-exit casesPavel Dovgalyuk1-2/+2
2018-03-16target/xtensa: add linux-user supportMax Filippov1-9/+41
2018-02-21target/*/cpu.h: remove softfloat.hAlex Bennée1-0/+1
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier1-2/+2
2017-12-18target/xtensa: pass actual frame size to the entry helperMax Filippov1-1/+1
2017-09-26target/xtensa: Use the pre-defined MEMTXATTRS_UNSPECIFIED macroAlistair Francis1-2/+2
2017-03-09target/xtensa: hold BQL for interrupt processingAlex Bennée1-0/+7
2017-01-25Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into stagingPeter Maydell1-8/+65
2017-01-16target-xtensa: implement RER/WER instructionsMax Filippov1-0/+12
2017-01-15target/xtensa: implement MEMCTL SRMax Filippov1-0/+24
2017-01-15target/xtensa: support icountMax Filippov1-0/+4
2017-01-15target/xtensa: refactor CCOUNT/CCOMPAREMax Filippov1-8/+25
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-1/+1
2017-01-10target-xtensa: Use clz opcodeRichard Henderson1-13/+0
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+984