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path: root/target/xtensa/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé1-1/+1
2022-05-06target/xtensa: add clock input to xtensa CPUMax Filippov1-0/+5
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau1-3/+3
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau1-0/+1
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé1-1/+1
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé1-2/+0
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé1-4/+3
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé1-1/+1
2021-11-02target/xtensa: Make xtensa_cpu_tlb_fill sysemu onlyRichard Henderson1-1/+1
2021-09-21hw/core: Make do_unaligned_access noreturnRichard Henderson1-2/+2
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson1-2/+0
2021-09-14target/xtensa: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé1-2/+2
2021-09-14target/xtensa: Restrict do_transaction_failed() to sysemuPhilippe Mathieu-Daudé1-0/+2
2021-05-20target/xtensa: don't generate extra EXCP_DEBUG on exceptionMax Filippov1-7/+0
2020-08-21target/xtensa: add DFPU registers and opcodesMax Filippov1-0/+3
2020-08-21target/xtensa: add DFPU optionMax Filippov1-0/+2
2020-08-21target/xtensa: support copying registers up to 64 bits wideMax Filippov1-0/+1
2020-08-21target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov1-1/+1
2020-08-21target/xtensa: implement NMI supportMax Filippov1-0/+1
2020-08-21target/xtensa: make opcode properties more dynamicMax Filippov1-4/+1
2020-05-17target/xtensa: fetch HW version from configuration overlayMax Filippov1-0/+1
2020-04-07target/xtensa: statically allocate xtensa_insnbufs in DisasContextMax Filippov1-0/+3
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée1-1/+1
2020-01-15target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIXRichard Henderson1-4/+0
2020-01-06target/xtensa: fix ps.ring use in MPU configsMax Filippov1-3/+7
2019-09-11target/xtensa: linux-user: add call0 ABI supportMax Filippov1-0/+3
2019-08-20configure: Define target access alignment in configuretony.nguyen@bt.com1-2/+0
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster1-1/+0
2019-06-10cpu: Remove CPU_COMMONRichard Henderson1-2/+0
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson1-0/+1
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson1-2/+0
2019-06-10target/xtensa: Use env_cpu, env_archcpuRichard Henderson1-11/+6
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson1-2/+0
2019-06-10cpu: Define ArchCPURichard Henderson1-0/+1
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson1-2/+2
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson1-16/+5
2019-05-21Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into stagingPeter Maydell1-23/+35
2019-05-15target/xtensa: implement exclusive access optionMax Filippov1-0/+2
2019-05-15target/xtensa: update list of exception causesMax Filippov1-4/+5
2019-05-14target/xtensa: implement DIWBUI.P opcodeMax Filippov1-0/+1
2019-05-10target/xtensa: implement MPU optionMax Filippov1-0/+17
2019-05-10target/xtensa: add parity/ECC option SRsMax Filippov1-0/+6
2019-05-10target/xtensa: define IDMA and gather/scatter IRQ typesMax Filippov1-0/+3
2019-05-10target/xtensa: make internal MMU functions staticMax Filippov1-19/+0
2019-05-10target/xtensa: get rid of centralized SR propertiesMax Filippov1-0/+1
2019-05-10target/xtensa: Convert to CPUClass::tlb_fillRichard Henderson1-2/+3
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster1-2/+1
2019-04-18target: Clean up how the dump_mmu() printMarkus Armbruster1-1/+1
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