| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-09-01 | xtensa: replace cpu_xtensa_init() with cpu_generic_init() | Igor Mammedov | 1 | -3/+1 |
| 2017-06-06 | target/xtensa: support output to chardev console | Max Filippov | 1 | -0/+1 |
| 2017-02-23 | target/xtensa: sim: instantiate local memories | Max Filippov | 1 | -0/+16 |
| 2017-01-16 | target-xtensa: implement RER/WER instructions | Max Filippov | 1 | -0/+7 |
| 2017-01-15 | target/xtensa: implement MEMCTL SR | Max Filippov | 1 | -0/+19 |
| 2017-01-15 | target/xtensa: support icount | Max Filippov | 1 | -0/+5 |
| 2017-01-15 | target/xtensa: refactor CCOUNT/CCOMPARE | Max Filippov | 1 | -5/+11 |
| 2017-01-15 | target/xtensa: implement RUNSTALL | Max Filippov | 1 | -1/+2 |
| 2017-01-15 | target/xtensa: add static vectors selection | Max Filippov | 1 | -1/+9 |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth | 1 | -0/+587 |
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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