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path: root/target/sparc/ldst_helper.c
AgeCommit message (Expand)AuthorFilesLines
2022-02-21exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé1-0/+1
2021-11-02target/sparc: Set fault address in sparc_cpu_do_unaligned_accessRichard Henderson1-13/+0
2021-11-02target/sparc: Remove DEBUG_UNALIGNEDRichard Henderson1-9/+0
2021-10-13target/sparc: Use cpu_*_mmu instead of helper_*_mmuRichard Henderson1-7/+7
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-1/+1
2020-11-15sparc tcg cpus: Fix Lesser GPL version numberChetan Pant1-1/+1
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2019-09-17target/sparc: Switch to do_transaction_failed() hookPeter Maydell1-4/+12
2019-09-17target/sparc: Check for transaction failures in MXCC stream ASI accessesPeter Maydell1-20/+37
2019-09-17target/sparc: Check for transaction failures in MMU passthrough ASIsPeter Maydell1-16/+33
2019-09-17target/sparc: Factor out the body of sparc_cpu_unassigned_access()Peter Maydell1-95/+106
2019-06-10target/sparc: Use env_cpu, env_archcpuRichard Henderson1-18/+15
2019-05-10tcg: Use CPUClass::tlb_fill in cputlb.cRichard Henderson1-6/+0
2019-05-10target/sparc: Convert to CPUClass::tlb_fillRichard Henderson1-10/+1
2019-04-18target: Clean up how the dump_mmu() printMarkus Armbruster1-9/+9
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier1-3/+3
2017-09-01sparc: embed sparc_def_t into CPUSPARCStateIgor Mammedov1-7/+7
2017-02-24cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée1-3/+5
2017-01-18target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko1-8/+44
2017-01-18target-sparc: implement UA2005 ASI_MMU (0x21)Artyom Tarasenko1-0/+31
2017-01-18target-sparc: implement auto-demapping for UA2005 CPUsArtyom Tarasenko1-0/+22
2017-01-18target-sparc: simplify ultrasparc_tsb_pointerArtyom Tarasenko1-36/+15
2017-01-18target-sparc: implement UA2005 TSB PointersArtyom Tarasenko1-22/+102
2017-01-18target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko1-4/+4
2017-01-18target-sparc: replace the last tlb entry when no free entries leftArtyom Tarasenko1-2/+4
2017-01-18target-sparc: ignore writes to UA2005 CPU mondo queue registerArtyom Tarasenko1-0/+1
2017-01-18target-sparc: allow priveleged ASIs in hyperprivileged modeArtyom Tarasenko1-14/+18
2017-01-18target-sparc: implement UA2005 scratchpad registersArtyom Tarasenko1-0/+24
2017-01-18target-sparc: simplify replace_tlb_entry by using TTE_PGSIZEArtyom Tarasenko1-3/+2
2017-01-18target-sparc: use explicit mmu register pointersArtyom Tarasenko1-12/+54
2017-01-18target-sparc: ignore MMU-faults if MMU is disabled in hypervisor modeArtyom Tarasenko1-2/+13
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée1-6/+6
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+1709