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ldst_helper.c
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2022-02-21
exec/exec-all: Move 'qemu/log.h' include in units requiring it
Philippe Mathieu-Daudé
1
-0
/
+1
2021-11-02
target/sparc: Set fault address in sparc_cpu_do_unaligned_access
Richard Henderson
1
-13
/
+0
2021-11-02
target/sparc: Remove DEBUG_UNALIGNED
Richard Henderson
1
-9
/
+0
2021-10-13
target/sparc: Use cpu_*_mmu instead of helper_*_mmu
Richard Henderson
1
-7
/
+7
2021-10-05
tcg: Rename TCGMemOpIdx to MemOpIdx
Richard Henderson
1
-1
/
+1
2020-11-15
sparc tcg cpus: Fix Lesser GPL version number
Chetan Pant
1
-1
/
+1
2020-01-15
tcg: Search includes from the project root source directory
Philippe Mathieu-Daudé
1
-1
/
+1
2019-09-17
target/sparc: Switch to do_transaction_failed() hook
Peter Maydell
1
-4
/
+12
2019-09-17
target/sparc: Check for transaction failures in MXCC stream ASI accesses
Peter Maydell
1
-20
/
+37
2019-09-17
target/sparc: Check for transaction failures in MMU passthrough ASIs
Peter Maydell
1
-16
/
+33
2019-09-17
target/sparc: Factor out the body of sparc_cpu_unassigned_access()
Peter Maydell
1
-95
/
+106
2019-06-10
target/sparc: Use env_cpu, env_archcpu
Richard Henderson
1
-18
/
+15
2019-05-10
tcg: Use CPUClass::tlb_fill in cputlb.c
Richard Henderson
1
-6
/
+0
2019-05-10
target/sparc: Convert to CPUClass::tlb_fill
Richard Henderson
1
-10
/
+1
2019-04-18
target: Clean up how the dump_mmu() print
Markus Armbruster
1
-9
/
+9
2018-01-25
accel/tcg: add size paremeter in tlb_fill()
Laurent Vivier
1
-3
/
+3
2017-09-01
sparc: embed sparc_def_t into CPUSPARCState
Igor Mammedov
1
-7
/
+7
2017-02-24
cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap
Alex Bennée
1
-3
/
+5
2017-01-18
target-sparc: store the UA2005 entries in sun4u format
Artyom Tarasenko
1
-8
/
+44
2017-01-18
target-sparc: implement UA2005 ASI_MMU (0x21)
Artyom Tarasenko
1
-0
/
+31
2017-01-18
target-sparc: implement auto-demapping for UA2005 CPUs
Artyom Tarasenko
1
-0
/
+22
2017-01-18
target-sparc: simplify ultrasparc_tsb_pointer
Artyom Tarasenko
1
-36
/
+15
2017-01-18
target-sparc: implement UA2005 TSB Pointers
Artyom Tarasenko
1
-22
/
+102
2017-01-18
target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs
Artyom Tarasenko
1
-4
/
+4
2017-01-18
target-sparc: replace the last tlb entry when no free entries left
Artyom Tarasenko
1
-2
/
+4
2017-01-18
target-sparc: ignore writes to UA2005 CPU mondo queue register
Artyom Tarasenko
1
-0
/
+1
2017-01-18
target-sparc: allow priveleged ASIs in hyperprivileged mode
Artyom Tarasenko
1
-14
/
+18
2017-01-18
target-sparc: implement UA2005 scratchpad registers
Artyom Tarasenko
1
-0
/
+24
2017-01-18
target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE
Artyom Tarasenko
1
-3
/
+2
2017-01-18
target-sparc: use explicit mmu register pointers
Artyom Tarasenko
1
-12
/
+54
2017-01-18
target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode
Artyom Tarasenko
1
-2
/
+13
2017-01-13
cputlb: drop flush_global flag from tlb_flush
Alex Bennée
1
-6
/
+6
2016-12-20
Move target-* CPU file into a target/ folder
Thomas Huth
1
-0
/
+1709