aboutsummaryrefslogtreecommitdiff
path: root/target/sh4
AgeCommit message (Expand)AuthorFilesLines
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()LluĂ­s Vilanova1-3/+2
2017-07-18target/sh4: Use tcg_gen_lookup_and_goto_ptrRichard Henderson1-10/+20
2017-07-18target/sh4: Implement fsrraRichard Henderson3-0/+19
2017-07-18target/sh4: Add missing FPSCR.PR == 0 checksRichard Henderson1-0/+2
2017-07-18target/sh4: Implement fpchgRichard Henderson1-0/+5
2017-07-18target/sh4: Introduce CHECK_SH4ARichard Henderson1-34/+30
2017-07-18target/sh4: Introduce CHECK_FPSCR_PR_*Richard Henderson1-26/+31
2017-07-18target/sh4: Tidy misc illegal insn checksRichard Henderson1-9/+13
2017-07-18target/sh4: Unify code for CHECK_FPU_ENABLEDRichard Henderson1-10/+14
2017-07-18target/sh4: Unify code for CHECK_PRIVILEGEDRichard Henderson1-10/+4
2017-07-18target/sh4: Unify code for CHECK_NOT_DELAY_SLOTRichard Henderson1-6/+5
2017-07-18target/sh4: Simplify 64-bit fp reg-reg moveRichard Henderson1-4/+4
2017-07-18target/sh4: Load/store Dr as 64-bit quantitiesRichard Henderson1-39/+36
2017-07-18target/sh4: Merge DREG into fpr64 routinesRichard Henderson1-11/+15
2017-07-18target/sh4: Eliminate unused XREG macroRichard Henderson1-1/+0
2017-07-18target/sh4: Hoist fp register bank selectionRichard Henderson1-3/+5
2017-07-18target/sh4: Pass DisasContext to fpr64 routinesRichard Henderson1-13/+13
2017-07-18target/sh4: Unify cpu_fregs into FREGRichard Henderson1-73/+52
2017-07-18target/sh4: Hoist register bank selectionRichard Henderson1-10/+11
2017-07-18target/sh4: Recognize common gUSA sequencesRichard Henderson1-0/+321
2017-07-18target/sh4: Handle user-space atomicsRichard Henderson4-15/+148
2017-07-18target/sh4: Adjust TB_FLAG_PENDING_MOVCARichard Henderson1-3/+3
2017-07-18target/sh4: Keep env->flags cleanRichard Henderson2-2/+2
2017-07-18target/sh4: Introduce TB_FLAG_ENVFLAGS_MASKRichard Henderson2-3/+5
2017-07-18target/sh4: Consolidate end-of-TB testsRichard Henderson1-14/+17
2017-07-18target/sh4: return result of fcmp using TCGAurelien Jarno3-16/+18
2017-07-18target/sh4: do not use a helper to implement fnegAurelien Jarno3-9/+2
2017-07-18target/sh4: fix FPSCR cause vs flag inversionAurelien Jarno1-10/+10
2017-07-18target/sh4: fix FPU unorderered compareAurelien Jarno1-20/+8
2017-07-18target/sh4: do not check for PR bit for fabs instructionAurelien Jarno3-24/+3
2017-05-30target/sh4: fix RTE instruction delay slotAurelien Jarno2-5/+16
2017-05-30target/sh4: ignore interrupts in a delay slotAurelien Jarno1-2/+10
2017-05-30target/sh4: introduce DELAY_SLOT_MASKAurelien Jarno3-12/+12
2017-05-30target/sh4: fix reset when using a kernel and an initrdAurelien Jarno1-1/+9
2017-05-30target/sh4: log unauthorized accesses using qemu_log_maskAurelien Jarno1-1/+1
2017-05-13target/sh4: use cpu_loop_exit_restoreAurelien Jarno1-8/+2
2017-05-13target/sh4: trap unaligned accessesAurelien Jarno4-2/+25
2017-05-13target/sh4: movua.l is an SH4-A only instructionAurelien Jarno1-11/+15
2017-05-13target/sh4: implement tas.b using atomic helperAurelien Jarno1-12/+7
2017-05-13target/sh4: generate fences for SH4Aurelien Jarno1-4/+5
2017-05-13target/sh4: optimize gen_write_sr using extract opAurelien Jarno1-6/+3
2017-05-13target/sh4: optimize gen_store_fpr64Aurelien Jarno1-7/+1
2017-05-13target/sh4: fold ctx->bstate = BS_BRANCH into gen_conditional_jumpAurelien Jarno1-6/+3
2017-05-13target/sh4: only save flags state at the end of the TBAurelien Jarno1-36/+33
2017-05-13target/sh4: fix BS_EXCP exitAurelien Jarno1-9/+7
2017-05-13target/sh4: fix BS_STOP exitAurelien Jarno1-2/+3
2017-05-13target/sh4: move DELAY_SLOT_TRUE flag into a separate globalAurelien Jarno3-18/+16
2017-05-13target/sh4: do not include DELAY_SLOT_TRUE in the TB stateAurelien Jarno1-2/+1
2017-05-13target/sh4: get rid of DELAY_SLOT_CLEARMEAurelien Jarno3-16/+6
2017-05-13target/sh4: split ctx->flags into ctx->tbflags and ctx->envflagsAurelien Jarno1-79/+82