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2024-12-15target/s390x: Constify all PropertyRichard Henderson1-1/+1
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-12Merge tag 'pull-target-arm-20241211' of ↵Stefan Hajnoczi1-0/+5
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * hw/net/lan9118: Extract PHY model, reuse with imx_fec, fix bugs * fpu: Make muladd NaN handling runtime-selected, not compile-time * fpu: Make default NaN pattern runtime-selected, not compile-time * fpu: Minor NaN-related cleanups * MAINTAINERS: email address updates # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmdZu14ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3mgiD/98Q+m7/t54FdCd2bx1cr2k # dw+7DYhp+60Vo3OjlGtKWwPD67oN8e0jhOoArmJNW0Fmkcsvfvd4wv6kCf8zftLm # 0/lPO687mvFNCAprTch+z2pGB7aS0HdIr126ytsyg5PlHtldd+OBA+yUUYafR3zo # BECRSWZmMFxfl9uckJzntdntghTX5pnJDSGBYE9NEyRfo0Ntj1HvhaHSQJkqpf5B # QwE8R965CXc4i34PqlOCju47AXwJc3x36ftdiNmpPvMS4odG9yb/OmhHSgVZlThb # 1x0HEX69KF5FQbtVNDMmFyYehDzqYFpqOSa1IKtaNLmDSZJ5P8fWw4eBdMdr/QyD # QKssgHAO6Z13MLppK4B1PFtSVlsLYUURYddYUFz4RUNOxrS/pzAIT0KhClYFytQo # x9xid4fng1PY9doYEM3v4vEQCU6S+2aj2gU4EOwdB8GmMhtjSl8YlcEs7cysqkoQ # gbGX97i6Eh616q9VsRzUwcY6u4XP/lssn6I98k4AEqgRpyFCMTLyFodV89d6J4EJ # IJKsJf10gctpe1JdMgtDxuleKOZc+O5nOMJLKYwc9siakCBZsH7zmgS6m8QVoUSD # 7R+4OtbaQwM0+GPbc0AhAlDtq3Q1QAtCYa94iICUixC4NjzfdC9B9yCz1XnA7sfS # jPHU8INw6rz3psEnlFQdhA== # =+ELh # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 Dec 2024 11:18:38 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20241211' of https://git.linaro.org/people/pmaydell/qemu-arm: (72 commits) MAINTAINERS: Add correct email address for Vikram Garhwal MAINTAINERS: update email address for Leif Lindholm softfloat: Replace WHICH with RET in parts_pick_nan softfloat: Sink frac_cmp in parts_pick_nan until needed softfloat: Share code between parts_pick_nan cases softfloat: Inline pickNaN softfloat: Use parts_pick_nan in propagateFloatx80NaN softfloat: Move propagateFloatx80NaN to softfloat.c softfloat: Pad array size in pick_nan_muladd softfloat: Remove which from parts_pick_nan_muladd softfloat: Use goto for default nan case in pick_nan_muladd softfloat: Inline pickNaNMulAdd fpu: Remove default handling for dnan_pattern target/tricore: Set default NaN pattern explicitly target/riscv: Set default NaN pattern explicitly target/hexagon: Set default NaN pattern explicitly target/xtensa: Set default NaN pattern explicitly target/sparc: Set default NaN pattern explicitly target/s390x: Set default NaN pattern explicitly target/rx: Set default NaN pattern explicitly ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2024-12-11target/s390x: Set default NaN pattern explicitlyPeter Maydell1-0/+2
Set the default NaN pattern explicitly for s390x. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-49-peter.maydell@linaro.org
2024-12-11target/s390x: Set Float3NaNPropRule explicitlyPeter Maydell1-0/+1
Set the Float3NaNPropRule explicitly for s390x, and remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-21-peter.maydell@linaro.org
2024-12-11target/s390: Set FloatInfZeroNaNRule explicitlyPeter Maydell1-0/+2
Set the FloatInfZeroNaNRule explicitly for s390, so we can remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241202131347.498124-7-peter.maydell@linaro.org
2024-12-11s390x/cpumodel: gen17 modelHendrik Brueckner2-0/+35
This commit introduces the definition of the gen17a/gen17b CPU model. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Message-ID: <20241206122751.189721-16-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: Add PLO-extension facilityHendrik Brueckner4-0/+123
The PLO-extension facility introduces numerous locking related subfunctions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-15-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: correct PLO feature wordingHendrik Brueckner1-6/+6
The PLO functions 0, 4, 8, 12, 16, and 20 use 32-bit registers values. The plo-*gr variants use 64-bit instead and, thus, correct the wording. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-14-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: Add Sequential-Instruction-Fetching facilityHendrik Brueckner1-0/+1
The sequential instruction fetching facility provides few guarantees, for example, to avoid stop machine calls on enabling/disabling kprobes. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-13-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add Ineffective-nonconstrained-transaction facilityHendrik Brueckner2-0/+2
This facility indicates reduced support for noncontrained transactional-execution. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-12-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add Vector-Packed-Decimal-Enhancement facility 3Hendrik Brueckner2-0/+2
This facility introduces new capabilities for the signed-pack-decimal format. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-11-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add Miscellaneous-Instruction-Extensions Facility 4Hendrik Brueckner1-0/+1
This facility introduces few new instructions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-10-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add Vector Enhancements facility 3Hendrik Brueckner2-0/+3
The Vector Enhancements facility 3 introduces new instructions and extends support for doubleword/quadword elements. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-9-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add Concurrent-functions facility supportHendrik Brueckner6-0/+35
The Concurrent-functions facility introduces the new instruction Perform Functions with Concurrent Results (PFCR) with few subfunctions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-8-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: Add ptff Query Time-Stamp Event (QTSE) supportHendrik Brueckner3-0/+11
Introduce a new PTFF subfunction to query-stamp events. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-6-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add msa13 subfunctionsHendrik Brueckner3-0/+40
MSA13 introduces query authentication information (QAI) subfunctions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-ID: <20241206122751.189721-5-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add msa12 changesHendrik Brueckner3-0/+10
MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Message-ID: <20241206122751.189721-4-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add msa11 subfunctionsHendrik Brueckner4-0/+44
MSA11 introduces new HMAC subfunctions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Message-ID: <20241206122751.189721-3-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-11s390x/cpumodel: add msa10 subfunctionsHendrik Brueckner4-0/+32
MSA10 introduces new AES XTS subfunctions. Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Message-ID: <20241206122751.189721-2-brueckner@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-18target/s390x: Fix the floating-point multiply-and-add NaN rulesIlya Leoshkevich2-10/+10
Order the helper arguments to match the Principles of Operation. Implement the "Results: MULTIPLY AND ADD" table in pickNaNMulAdd(). Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20241023000147.34035-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-05target/s390x: Explicitly set 2-NaN propagation rulePeter Maydell1-0/+1
Set the 2-NaN propagation rule explicitly in env->fpu_status. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20241025141254.2141506-8-peter.maydell@linaro.org
2024-10-23s390x: Rebuild IPLB for SCSI device directly from DIAG308Jared Rossi1-1/+8
Because virtio-scsi type devices use a non-architected IPLB pbt code they cannot be set and stored normally. Instead, the IPLB must be rebuilt during re-ipl. As s390x does not natively support multiple boot devices, the devno field is used to store the position in the boot order for the device. Handling the rebuild as part of DIAG308 removes the need to check the devices for invalid IPLBs later in the IPL. Signed-off-by: Jared Rossi <jrossi@linux.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241020012953.1380075-17-jrossi@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-07target/s390x: Use explicit big-endian LD/ST APIPhilippe Mathieu-Daudé2-18/+18
The S390X architecture uses big endianness. Directly use the big-endian LD/ST API. Mechanical change using: $ end=be; \ for acc in uw w l q tul; do \ sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \ -e "s/st${acc}_p(/st${acc}_${end}_p(/" \ $(git grep -wlE '(ld|st)t?u?[wlq]_p' target/s390x/); \ done Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20241004163042.85922-24-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-07target/s390x: Replace ldtul_p() -> ldq_p()Philippe Mathieu-Daudé1-15/+15
The S390X target is only built for 64-bit. Using ldtul_p() is pointless, replace by ldq_p(). Mechanical change doing: $ sed -i -e 's/ldtul_p/ldq_p/' $(git grep -wl ldtul_p target/s390x/) Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241004163042.85922-5-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-10-03kvm: Allow kvm_arch_get/put_registers to accept Error**Julia Suvorova1-2/+2
This is necessary to provide discernible error messages to the caller. Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Link: https://lore.kernel.org/r/20240927104743.218468-2-jusual@redhat.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2024-09-20license: Update deprecated SPDX tag GPL-2.0+ to GPL-2.0-or-laterPhilippe Mathieu-Daudé1-1/+1
The 'GPL-2.0+' license identifier has been deprecated since license list version 2.0rc2 [1] and replaced by the 'GPL-2.0-or-later' [2] tag. [1] https://spdx.org/licenses/GPL-2.0+.html [2] https://spdx.org/licenses/GPL-2.0-or-later.html Mechanical patch running: $ sed -i -e s/GPL-2.0+/GPL-2.0-or-later/ \ $(git grep -lP 'SPDX-License-Identifier: \W+GPL-2.0\+[ $]' \ | egrep -v '^linux-headers|^include/standard-headers') Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-09-13target/s390: Convert CPU to Resettable interfacePeter Maydell3-44/+23
Convert the s390 CPU to the Resettable interface. This is slightly more involved than the other CPU types were (see commits 9130cade5fc22..d66e64dd006df) because S390 has its own set of different kinds of reset with different behaviours that it needs to trigger. We handle this by adding these reset types to the Resettable ResetType enum. Now instead of having an underlying implementation of reset that is s390-specific and which might be called either directly or via the DeviceClass::reset method, we can implement only the Resettable hold phase method, and have the places that need to trigger an s390-specific reset type do so by calling resettable_reset(). The other option would have been to smuggle in the s390 reset type via, for instance, a field in the CPU state that we set in s390_do_cpu_initial_reset() etc and then examined in the reset method, but doing it this way seems cleaner. The motivation for this change is that this is the last caller of the legacy device_class_set_parent_reset() function, and removing that will let us clean up some glue code that we added for the transition to three-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-id: 20240830145812.1967042-4-peter.maydell@linaro.org
2024-09-10qapi/machine: Rename CpuS390* to S390Cpu*, and drop 'prefix'Markus Armbruster1-1/+1
QAPI's 'prefix' feature can make the connection between enumeration type and its constants less than obvious. It's best used with restraint. CpuS390Entitlement has a 'prefix' to change the generated enumeration constants' prefix from CPU_S390_ENTITLEMENT to S390_CPU_ENTITLEMENT. Rename the type to S390CpuEntitlement, so that 'prefix' is not needed. Likewise change CpuS390Polarization to S390CpuPolarization, and CpuS390State to S390CpuState. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240904111836.3273842-10-armbru@redhat.com>
2024-08-15target/s390x: fix build warning (gcc-12 -fsanitize=thread)Pierrick Bouvier1-1/+0
Found on debian stable. ../target/s390x/tcg/translate.c: In function ‘get_mem_index’: ../target/s390x/tcg/translate.c:398:1: error: control reaches end of non-void function [-Werror=return-type] 398 | } Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20240814224132.897098-4-pierrick.bouvier@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-07-29target/s390x: move @deprecated-props to CpuModelExpansion InfoCollin Walling1-11/+18
CpuModelInfo is used both as command argument and in command returns. Its @deprecated-props array does not make any sense in arguments, and is silently ignored. We actually want it only as return value of query-cpu-model-expansion. Move it from CpuModelInfo to CpuModelExpansionType, and document its dependence on expansion type property. This was identified late during review [1] and we have to fix it up while it's not part of an official QEMU release yet. [1] https://lore.kernel.org/qemu-devel/20240719181741.35146-1-walling@linux.ibm.com/ Message-ID: <20240726203646.20279-1-walling@linux.ibm.com> Fixes: eed0e8ffa38f ("target/s390x: filter deprecated properties based on model expansion type") Signed-off-by: Collin Walling <walling@linux.ibm.com> [ david: - add "Fixes", adjust description, reference v3 instead - make property s390x-only and non-optional - fixup "populate" vs. "populated" ] Signed-off-by: David Hildenbrand <david@redhat.com>
2024-07-23Merge tag 'pull-tcg-20240723' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson1-40/+65
accel/tcg: Export set/clear_helper_retaddr target/arm: Use set_helper_retaddr for dc_zva, sve and sme target/ppc: Tidy dcbz helpers target/ppc: Use set_helper_retaddr for dcbz target/s390x: Use set_helper_retaddr in mem_helper.c # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmafJKIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+FBAf7Bup+karxeGHZx2rN # cPeF248bcCWTxBWHK7dsYze4KqzsrlNIJlPeOKErU2bbbRDZGhOp1/N95WVz+P8V # 6Ny63WTsAYkaFWKxE6Jf0FWJlGw92btk75pTV2x/TNZixg7jg0vzVaYkk0lTYc5T # m5e4WycYEbzYm0uodxI09i+wFvpd+7WCnl6xWtlJPWZENukvJ36Ss43egFMDtuMk # vTJuBkS9wpwZ9MSi6EY6M+Raieg8bfaotInZeDvE/yRPNi7CwrA7Dgyc1y626uBA # joGkYRLzhRgvT19kB3bvFZi1AXa0Pxr+j0xJqwspP239Gq5qezlS5Bv/DrHdmGHA # jaqSwg== # =XgUE # -----END PGP SIGNATURE----- # gpg: Signature made Tue 23 Jul 2024 01:33:54 PM AEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20240723' of https://gitlab.com/rth7680/qemu: target/riscv: Simplify probing in vext_ldff target/s390x: Use set/clear_helper_retaddr in mem_helper.c target/s390x: Use user_or_likely in access_memmove target/s390x: Use user_or_likely in do_access_memset target/ppc: Improve helper_dcbz for user-only target/ppc: Merge helper_{dcbz,dcbzep} target/ppc: Split out helper_dbczl for 970 target/ppc: Hoist dcbz_size out of dcbz_common target/ppc/mem_helper.c: Remove a conditional from dcbz_common() target/arm: Use set/clear_helper_retaddr in SVE and SME helpers target/arm: Use set/clear_helper_retaddr in helper-a64.c accel/tcg: Move {set,clear}_helper_retaddr to cpu_ldst.h Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23target/s390x: Use set/clear_helper_retaddr in mem_helper.cRichard Henderson1-6/+37
Avoid a race condition with munmap in another thread. For access_memset and access_memmove, manage the value within the helper. For uses of access_{get,set}_byte, manage the value across the for loops. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23target/s390x: Use user_or_likely in access_memmoveRichard Henderson1-29/+27
Invert the conditional, indent the block, and use the macro that expands to true for user-only. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-23target/s390x: Use user_or_likely in do_access_memsetRichard Henderson1-5/+1
Eliminate the ifdef by using a predicate that is always true with CONFIG_USER_ONLY. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-07-22target/s390x: filter deprecated properties based on model expansion typeCollin Walling1-7/+9
Currently, there is no way to execute the query-cpu-model-expansion command to retrieve a comprehenisve list of deprecated properties, as the result is dependent per-model. To enable this, the expansion output is modified as such: When reporting a "full" CPU model, show the *entire* list of deprecated properties regardless if they are supported on the model. A full expansion outputs all known CPU model properties anyway, so it makes sense to report all deprecated properties here too. This allows management apps to query a single model (e.g. host) to acquire the full list of deprecated properties. Additionally, when reporting a "static" CPU model, the command will only show deprecated properties that are a subset of the model's *enabled* properties. This is more accurate than how the query was handled before, which blindly reported deprecated properties that were never otherwise introduced for certain models. Acked-by: David Hildenbrand <david@redhat.com> Suggested-by: Jiri Denemark <jdenemar@redhat.com> Signed-off-by: Collin Walling <walling@linux.ibm.com> Message-ID: <20240719181741.35146-1-walling@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-07-11target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementationPeter Maydell1-0/+1
Currently the TCGCPUOps::cpu_exec_halt method is optional, and if it is not set then the default is to call the CPUClass::has_work method (which has an identical function signature). We would like to make the cpu_exec_halt method mandatory so we can remove the runtime check and fallback handling. In preparation for that, make all the targets which don't need special handling in their cpu_exec_halt set it to their cpu_has_work implementation instead of leaving it unset. (This is every target except for arm and i386.) In the riscv case this requires us to make the function not be local to the source file it's defined in. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-06-24Merge tag 'pull-maintainer-june24-240624-1' of ↵Richard Henderson1-1/+1
https://gitlab.com/stsquad/qemu into staging maintainer updates (plugins, gdbstub): - add missing include guard comment to gdbstub.h - move gdbstub enums into separate header - move qtest_[get|set]_virtual_clock functions - allow plugins to manipulate the virtual clock - introduce an Instructions Per Second plugin - fix inject_mem_cb rw mask tests - allow qemu_plugin_vcpu_mem_cb to shortcut when no memory cbs # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmZ5OjoACgkQ+9DbCVqe # KkQPlwf/VK673BAjYktuCLnf3DgWvIkkiHWwzBREP5MmseUloLjK2CQPLY/xWZED # pbA/1OSzHViD/mvG5wTxwef36b9PIleWj5/YwBxGlrb/rh6hCd9004pZK4EMI3qU # 53SK8Qron8TIXjey6XfmAY8rcl030GsHr0Zqf5i2pZKE5g0iaGlM3Cwkpo0SxQsu # kMNqiSs9NzX7LxB+YeuAauIvC1YA2F/MGTXeFCTtO9Beyp5oV7oOI+2zIvLjlG5M # Z5hKjG/STkNOteoIBGZpe1+QNpoGHSBoGE3nQnGpXb82iLx1KVBcKuQ6GoWGv1Wo # hqiSh9kJX479l0mLML+IzaDsgSglbg== # =pvWx # -----END PGP SIGNATURE----- # gpg: Signature made Mon 24 Jun 2024 02:19:54 AM PDT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] * tag 'pull-maintainer-june24-240624-1' of https://gitlab.com/stsquad/qemu: accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb plugins: fix inject_mem_cb rw masking contrib/plugins: add Instructions Per Second (IPS) example for cost modeling plugins: add migration blocker plugins: add time control API qtest: move qtest_{get, set}_virtual_clock to accel/qtest/qtest.c sysemu: generalise qtest_warp_clock as qemu_clock_advance_virtual_time qtest: use cpu interface in qtest_clock_warp sysemu: add set_virtual_time to accel ops plugins: Ensure register handles are not NULL gdbstub: move enums into separate header include/exec: add missing include guard comment Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-06-24gdbstub: move enums into separate headerAlex Bennée1-1/+1
This is an experiment to further reduce the amount we throw into the exec headers. It might not be as useful as I initially thought because just under half of the users also need gdbserver_start(). Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240620152220.2192768-3-alex.bennee@linaro.org>
2024-06-24target/s390x: Add a CONFIG switch to disable legacy CPUsThomas Huth2-0/+14
The oldest model that IBM still supports is the z13. Considering that each generation can "emulate" the previous two generations in hardware (via the "IBC" feature of the CPUs), this means that everything that is older than z114/196 is not an officially supported CPU model anymore. The Linux kernel still support the z10, so if we also take this into account, everything older than that can definitely be considered as a legacy CPU model. For downstream builds of QEMU, we would like to be able to disable these legacy CPUs in the build. Thus add a CONFIG switch that can be used to disable them (and old machine types that use them by default). Message-Id: <20240614125019.588928-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-06-24target/s390x/arch_dump: use correct byte order for pidOmar Sandoval1-1/+1
The pid field of prstatus needs to be big endian like all of the other fields. Fixes: f738f296eaae ("s390x/arch_dump: pass cpuid into notes sections") Signed-off-by: Omar Sandoval <osandov@osandov.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <5929f76d536d355afd04af51bf293695a1065118.1718771802.git.osandov@osandov.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-06-19target/s390x: Use s390_skeys_get|set() helperPhilippe Mathieu-Daudé3-25/+6
Commit c9274b6bf0 ("target/s390x: start moving TCG-only code to tcg/") moved mem_helper.c, but the trace-events file is still in the parent directory, so is the generated trace.h. Call the s390_skeys_get|set() helper, removing the need for the trace event shared with the tcg/ sub-directory, fixing the following build failure: In file included from ../target/s390x/tcg/mem_helper.c:33: ../target/s390x/tcg/trace.h:1:10: fatal error: 'trace/trace-target_s390x_tcg.h' file not found #include "trace/trace-target_s390x_tcg.h" Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20240613104415.9643-3-philmd@linaro.org>
2024-05-29target/s390x: Adjust check of noreturn in translate_oneRichard Henderson1-7/+8
If help_op is not set, ret == DISAS_NEXT. Shift the test up from surrounding help_wout, help_cout to skipping to out, as we do elsewhere in the function. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-14-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Simplify per_ifetch, per_check_exceptionRichard Henderson3-24/+23
Set per_address and ilen in per_ifetch; this is valid for all PER exceptions and will last until the end of the instruction. Therefore we don't need to give the same data to per_check_exception. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-13-richard.henderson@linaro.org> [thuth: Silence checkpatch.pl errors] Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Fix helper_per_ifetch flagsRichard Henderson1-1/+1
CPU state is read on the exception path. Fixes: 83bb161299c ("target-s390x: PER instruction-fetch nullification event support") Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Message-ID: <20240502054417.234340-12-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Raise exception from per_store_realRichard Henderson3-5/+8
At this point the instruction is complete and there's nothing left to do but raise the exception. With this change we need not make two helper calls for this event. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-11-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Raise exception from helper_per_branchRichard Henderson3-38/+27
Drop from argument, since gbea has always been updated with this address. Add ilen argument for setting int_pgm_ilen. Use update_cc_op before calling per_branch. By raising the exception here, we need not call per_check_exception later, which means we can clean up the normal non-exception branch path. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-10-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Split per_breaking_event from per_branch_*Richard Henderson1-3/+3
The breaking-event-address register is updated regardless of PER being enabled. Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-9-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Simplify help_branchRichard Henderson1-102/+50
Always use a tcg branch, instead of movcond. The movcond was not a bad idea before PER was added, but since then we have either 2 or 3 actions to perform on each leg of the branch, and multiple movcond is inefficient. Reorder the taken branch to be fallthrough of the tcg branch. Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-8-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Introduce help_goto_indirectRichard Henderson1-9/+10
Add a small helper to handle unconditional indirect jumps. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-7-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-05-29target/s390x: Disable conditional branch-to-next for PERRichard Henderson1-7/+7
For PER, we require a conditional call to helper_per_branch for the conditional branch. Fold the remaining optimization into a call to helper_goto_direct, which will take care of the remaining gbea adjustment. Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240502054417.234340-6-richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
generated by cgit v1.1 at 2025-01-11 16:41:49 +0000