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2021-07-07target/s390x: remove kvm-stub.cCho, Yu-Chen2-122/+1
2021-07-07target/s390x: use kvm_enabled() to wrap call to kvm_s390_get_hpage_1mCho, Yu-Chen1-1/+2
2021-07-07target/s390x: make helper.c sysemu-onlyCho, Yu-Chen2-9/+2
2021-07-07target/s390x: split cpu-dump from helper.cCho, Yu-Chen4-151/+178
2021-07-07target/s390x: move sysemu-only code out to cpu-sysemu.cCho, Yu-Chen5-277/+326
2021-07-07target/s390x: start moving TCG-only code to tcg/Cho, Yu-Chen22-17/+18
2021-07-07target/s390x: rename internal.h to s390x-internal.hCho, Yu-Chen24-23/+23
2021-07-07target/s390x: remove tcg-stub.cCho, Yu-Chen2-31/+1
2021-07-07target/s390x: meson: add target_user_archCho, Yu-Chen1-0/+3
2021-07-07s390x/tcg: Fix m5 vs. m4 field for VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand1-1/+1
2021-07-07target/s390x: Fix CC set by CONVERT TO FIXED/LOGICALUlrich Weigand3-43/+83
2021-07-07s390x/cpumodel: add 3931 and 3932Christian Borntraeger3-0/+25
2021-06-29tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64Richard Henderson1-2/+2
2021-06-21target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstubRichard Henderson1-13/+2
2021-06-21target/s390x: Improve s390_cpu_dump_state vs cc_opRichard Henderson1-5/+7
2021-06-21target/s390x: Do not modify cpu state in s390_cpu_get_psw_maskRichard Henderson1-4/+4
2021-06-21target/s390x: Expose load_psw and get_psw_mask to cpu.hRichard Henderson6-61/+69
2021-06-21s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2David Hildenbrand2-8/+11
2021-06-21s390x/tcg: We support Vector enhancements facilityDavid Hildenbrand1-0/+1
2021-06-21s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)David Hildenbrand5-0/+391
2021-06-21s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand4-2/+49
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand3-8/+87
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand3-2/+70
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand1-33/+73
2021-06-21s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDEDDavid Hildenbrand3-1/+30
2021-06-21s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENEDDavid Hildenbrand3-3/+30
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand3-9/+77
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *David Hildenbrand3-12/+121
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)David Hildenbrand3-15/+109
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)David Hildenbrand3-14/+153
2021-06-21s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand2-0/+52
2021-06-21s390x/tcg: Implement VECTOR BIT PERMUTEDavid Hildenbrand4-0/+33
2021-06-21s390x/tcg: Simplify wfc64() handlingDavid Hildenbrand1-11/+12
2021-06-21s390x/tcg: Simplify vflr64() handlingDavid Hildenbrand3-25/+8
2021-06-21s390x/tcg: Simplify vfll32() handlingDavid Hildenbrand3-22/+6
2021-06-21s390x/tcg: Simplify vfma64() handlingDavid Hildenbrand3-32/+20
2021-06-21s390x/tcg: Simplify vftci64() handlingDavid Hildenbrand3-24/+13
2021-06-21s390x/tcg: Simplify vfc64() handlingDavid Hildenbrand3-107/+38
2021-06-21s390x/tcg: Simplify vop64_2() handlingDavid Hildenbrand3-156/+58
2021-06-21s390x/tcg: Simplify vop64_3() handlingDavid Hildenbrand3-79/+30
2021-06-21s390x/tcg: Fix instruction name for VECTOR FP LOAD (LENGTHENED|ROUNDED)David Hildenbrand1-2/+2
2021-06-21s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handlingDavid Hildenbrand2-6/+43
2021-06-21s390x/kvm: remove unused gs handlingCornelia Huck3-15/+1
2021-06-02docs: fix references to docs/devel/tracing.rstStefano Garzarella1-1/+1
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson1-1/+1
2021-05-26cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::write_elf* to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::get_crash_info to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Move CPUClass::vmsd to SysemuCPUOpsPhilippe Mathieu-Daudé1-1/+1
2021-05-26cpu: Introduce SysemuCPUOps structurePhilippe Mathieu-Daudé1-0/+8