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path: root/target/s390x/vec_fpu_helper.c
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2021-07-07target/s390x: start moving TCG-only code to tcg/Cho, Yu-Chen1-1072/+0
2021-07-07target/s390x: rename internal.h to s390x-internal.hCho, Yu-Chen1-1/+1
2021-06-21s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)David Hildenbrand1-0/+328
2021-06-21s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand1-0/+2
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand1-1/+43
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand1-0/+47
2021-06-21s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDEDDavid Hildenbrand1-0/+19
2021-06-21s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENEDDavid Hildenbrand1-0/+13
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand1-1/+43
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *David Hildenbrand1-3/+61
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)David Hildenbrand1-1/+45
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)David Hildenbrand1-4/+70
2021-06-21s390x/tcg: Simplify wfc64() handlingDavid Hildenbrand1-11/+12
2021-06-21s390x/tcg: Simplify vflr64() handlingDavid Hildenbrand1-22/+7
2021-06-21s390x/tcg: Simplify vfll32() handlingDavid Hildenbrand1-16/+5
2021-06-21s390x/tcg: Simplify vfma64() handlingDavid Hildenbrand1-25/+17
2021-06-21s390x/tcg: Simplify vftci64() handlingDavid Hildenbrand1-18/+11
2021-06-21s390x/tcg: Simplify vfc64() handlingDavid Hildenbrand1-70/+24
2021-06-21s390x/tcg: Simplify vop64_2() handlingDavid Hildenbrand1-139/+51
2021-06-21s390x/tcg: Simplify vop64_3() handlingDavid Hildenbrand1-69/+25
2021-06-21s390x/tcg: Fix FP CONVERT TO (LOGICAL) FIXED NaN handlingDavid Hildenbrand1-2/+6
2020-05-19softfloat: Inline float64 compare specializationsRichard Henderson1-1/+1
2019-06-07s390x/tcg: Implement VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand1-0/+37
2019-06-07s390x/tcg: Implement VECTOR FP SUBTRACTDavid Hildenbrand1-0/+17
2019-06-07s390x/tcg: Implement VECTOR FP SQUARE ROOTDavid Hildenbrand1-0/+17
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand1-0/+48
2019-06-07s390x/tcg: Implement VECTOR FP MULTIPLYDavid Hildenbrand1-0/+17
2019-06-07s390x/tcg: Implement VECTOR LOAD ROUNDEDDavid Hildenbrand1-0/+43
2019-06-07s390x/tcg: Implement VECTOR LOAD LENGTHENEDDavid Hildenbrand1-0/+35
2019-06-07s390x/tcg: Implement VECTOR LOAD FP INTEGERDavid Hildenbrand1-0/+23
2019-06-07s390x/tcg: Implement VECTOR FP DIVIDEDavid Hildenbrand1-0/+17
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO LOGICAL 64-BITDavid Hildenbrand1-0/+23
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT TO FIXED 64-BITDavid Hildenbrand1-0/+23
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM LOGICAL 64-BITDavid Hildenbrand1-0/+23
2019-06-07s390x/tcg: Implement VECTOR FP CONVERT FROM FIXED 64-BITDavid Hildenbrand1-0/+47
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (EQUAL|HIGH|HIGH OR EQUAL)David Hildenbrand1-0/+104
2019-06-07s390x/tcg: Implement VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand1-0/+32
2019-06-07s390x/tcg: Implement VECTOR FP ADDDavid Hildenbrand1-0/+119
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