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path: root/target/s390x/translate_vx.c.inc
AgeCommit message (Expand)AuthorFilesLines
2021-06-21s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM)David Hildenbrand1-0/+44
2021-06-21s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand1-2/+37
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT)David Hildenbrand1-7/+40
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATEDavid Hildenbrand1-2/+21
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATIONDavid Hildenbrand1-33/+73
2021-06-21s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDEDDavid Hildenbrand1-1/+10
2021-06-21s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENEDDavid Hildenbrand1-3/+16
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE (AND SIGNAL) SCALARDavid Hildenbrand1-8/+30
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP COMPARE *David Hildenbrand1-9/+48
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR (LOAD FP INTEGER|FP SQUARE ROOT)David Hildenbrand1-14/+60
2021-06-21s390x/tcg: Implement 32/128 bit for VECTOR FP (ADD|DIVIDE|MULTIPLY|SUBTRACT)David Hildenbrand1-10/+75
2021-06-21s390x/tcg: Implement VECTOR MULTIPLY SUM LOGICALDavid Hildenbrand1-0/+50
2021-06-21s390x/tcg: Implement VECTOR BIT PERMUTEDavid Hildenbrand1-0/+8
2021-06-21s390x/tcg: Simplify vflr64() handlingDavid Hildenbrand1-2/+1
2021-06-21s390x/tcg: Simplify vfll32() handlingDavid Hildenbrand1-5/+1
2021-06-21s390x/tcg: Simplify vfma64() handlingDavid Hildenbrand1-5/+3
2021-06-21s390x/tcg: Simplify vftci64() handlingDavid Hildenbrand1-5/+2
2021-06-21s390x/tcg: Simplify vfc64() handlingDavid Hildenbrand1-31/+14
2021-06-21s390x/tcg: Simplify vop64_2() handlingDavid Hildenbrand1-11/+7
2021-06-21s390x/tcg: Simplify vop64_3() handlingDavid Hildenbrand1-6/+5
2020-08-21meson: rename included C source files to .c.incPaolo Bonzini1-0/+2718
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