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2022-03-16s390x/tcg: Fix BRCL with a large negative offsetIlya Leoshkevich1-1/+1
When RI2 is 0x80000000, qemu enters an infinite loop instead of jumping backwards. Fix by adding a missing cast, like in in2_ri2(). Fixes: 7233f2ed1717 ("target-s390: Convert BRANCH ON CONDITION") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220314104232.675863-3-iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-03-16s390x/tcg: Fix BRASL with a large negative offsetIlya Leoshkevich1-1/+1
When RI2 is 0x80000000, qemu enters an infinite loop instead of jumping backwards. Fix by adding a missing cast, like in in2_ri2(). Fixes: 8ac33cdb8bfb ("Convert BRANCH AND SAVE") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20220314104232.675863-2-iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-28s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the ↵David Miller3-5/+105
s390x implements: AND WITH COMPLEMENT (NCRK, NCGRK) NAND (NNRK, NNGRK) NOT EXCLUSIVE OR (NXRK, NXGRK) NOR (NORK, NOGRK) OR WITH COMPLEMENT (OCRK, OCGRK) SELECT (SELR, SELGR) SELECT HIGH (SELFHR) MOVE RIGHT TO LEFT (MVCRL) POPULATION COUNT (POPCNT) Resolves: https://gitlab.com/qemu-project/qemu/-/issues/737 Signed-off-by: David Miller <dmiller423@gmail.com> Message-Id: <20220223223117.66660-2-dmiller423@gmail.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-25s390x: sck: load into a temporary not into in1Nico Boehr2-3/+2
We previously loaded into in1, but in1 is not filled during disassembly and hence always zero. This leads to an assertion failure: qemu-system-s390x: /home/nrb/qemu/include/tcg/tcg.h:654: temp_idx: Assertion `n >= 0 && n < tcg_ctx->nb_temps' failed.` Instead, use in2_la2_m64a to load from storage into in2 and pass that to the helper, which matches what we already do for SCKC. This fixes the SCK test I sent here under TCG: <https://www.spinics.net/lists/kvm/msg265169.html> Fixes: 9dc67537 ("s390x/tcg: implement SET CLOCK ") Suggested-by: David Hildenbrand <david@redhat.com> Signed-off-by: Nico Boehr <nrb@linux.ibm.com> Message-Id: <20220126084201.774457-1-nrb@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-21exec/exec-all: Move 'qemu/log.h' include in units requiring itPhilippe Mathieu-Daudé2-0/+2
Many files use "qemu/log.h" declarations but neglect to include it (they inherit it via "exec/exec-all.h"). "exec/exec-all.h" is a core component and shouldn't be used that way. Move the "qemu/log.h" inclusion locally to each unit requiring it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220207082756.82600-10-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-17target/s390x: Fix shifting 32-bit values for more than 31 bitsIlya Leoshkevich3-76/+43
According to PoP, both 32- and 64-bit shifts use lowest 6 address bits. The current code special-cases 32-bit shifts to use only 5 bits, which is not correct. For example, shifting by 32 bits currently preserves the initial value, however, it's supposed zero it out instead. Fix by merging sh32 and sh64 and adapting CC calculation to shift values greater than 31. Fixes: cbe24bfa91d2 ("target-s390: Convert SHIFT, ROTATE SINGLE") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-5-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-17target/s390x: Fix cc_calc_sla_64() missing overflowsIlya Leoshkevich1-1/+1
An overflow occurs for SLAG when at least one shifted bit is not equal to sign bit. Therefore, we need to check that `shift + 1` bits are neither all 0s nor all 1s. The current code checks only `shift` bits, missing some overflows. Fixes: cbe24bfa91d2 ("target-s390: Convert SHIFT, ROTATE SINGLE") Co-developed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-4-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-17target/s390x: Fix SRDA CC calculationIlya Leoshkevich1-2/+4
SRDA uses r1_D32 for binding the first operand and s64 for setting CC. cout_s64() relies on o->out being the shift result, however, wout_r1_D32() clobbers it. Fix by using a temporary. Fixes: a79ba3398a0a ("target-s390: Convert SHIFT DOUBLE") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-3-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-17target/s390x: Fix SLDA sign bit indexIlya Leoshkevich1-1/+1
SLDA operates on 64-bit values, so its sign bit index should be 63, not 31. Fixes: a79ba3398a0a ("target-s390: Convert SHIFT DOUBLE") Reported-by: David Hildenbrand <david@redhat.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20220112165016.226996-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot4-31/+31
Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned. Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-11-02target/s390x: Implement s390x_cpu_record_sigbusRichard Henderson1-7/+20
For s390x, the only unaligned accesses that are signaled are atomic, and we don't actually want to raise SIGBUS for those, but instead raise a SPECIFICATION error, which the kernel will report as SIGILL. Split out a do_unaligned_access function to share between the user-only s390x_cpu_record_sigbus and the sysemu s390x_do_unaligned_access. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/s390x: Implement s390_cpu_record_sigsegvRichard Henderson1-7/+11
Move the masking of the address from cpu_loop into s390_cpu_record_sigsegv -- this is governed by hw, not linux. This does mean we have to raise our own exception, rather than return to the fallback. Use maperr to choose between PGM_PROTECTION and PGM_ADDRESSING. Use the appropriate si_code for each in cpu_loop. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02target/s390x: Use probe_access_flags in s390_probe_accessRichard Henderson1-13/+5
Not sure why the user-only code wasn't rewritten to use probe_access_flags at the same time that the sysemu code was converted. For the purpose of user-only, this is an exact replacement. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-15target/s390x: Drop check for singlestep_enabledRichard Henderson1-6/+2
GDB single-stepping is now handled generically. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13target/s390x: Use cpu_*_mmu instead of helper_*_mmuRichard Henderson1-4/+4
The helper_*_mmu functions were the only thing available when this code was written. This could have been adjusted when we added cpu_*_mmuidx_ra, but now we can most easily use the newest set of interfaces. Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.hRichard Henderson1-1/+0
The previous placement in tcg/tcg.h was not logical. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-13target/s390x: Use MO_128 for 16 byte atomicsRichard Henderson1-2/+2
Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-12target/s390x: move tcg_gen_insn_start to s390x_tr_insn_startRichard Henderson1-2/+8
We use INDEX_op_insn_start to make the start of instruction boundaries. If we don't do it in the .insn_start hook things get confused especially now plugins want to use that marking to identify the start of instructions and will bomb out if it sees instrumented ops before the first instruction boundary. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20211011185332.166763-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2021-10-05tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson1-10/+10
We're about to move this out of tcg.h, so rename it as we did when moving MemOp. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-05tcg: Expand MO_SIZE to 3 bitsRichard Henderson1-1/+1
We have lacked expressive support for memory sizes larger than 64-bits for a while. Fixing that requires adjustment to several points where we used this for array indexing, and two places that develop -Wswitch warnings after the change. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich1-7/+9
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> [rth: Split out of a larger patch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-09-06hw/s390x/s390-skeys: lazy storage key enablement under TCGDavid Hildenbrand1-0/+9
Let's enable storage keys lazily under TCG, just as we do under KVM. Only fairly old Linux versions actually make use of storage keys, so it can be kind of wasteful to allocate quite some memory and track changes and references if nobody cares. We have to make sure to flush the TLB when enabling storage keys after the VM was already running: otherwise it might happen that we don't catch references or modifications afterwards. Add proper documentation to all callbacks. The kvm-unit-tests skey tests keeps on working with this change. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-14-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/mmu_helper: move address validation into mmu_translate*()David Hildenbrand2-14/+1
Let's move address validation into mmu_translate() and mmu_translate_real(). This allows for checking whether an absolute address is valid before looking up the storage key. We can now get rid of the ram_size check. Interestingly, we're already handling LOAD REAL ADDRESS wrong, because a) We're not supposed to touch storage keys b) We're not supposed to convert to an absolute address Let's use a fake, negative MMUAccessType to teach mmu_translate() to fix that handling and to not perform address validation. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-8-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/tcg: check for addressing exceptions for RRBE, SSKE and ISKEDavid Hildenbrand1-13/+23
Let's replace the ram_size check by a proper physical address space check (for example, to prepare for memory hotplug), trigger addressing exceptions and trace the return value of the storage key getter/setter. Provide an helper mmu_absolute_addr_valid() to be used in other context soon. Always test for "read" instead of "write" as we are not actually modifying the page itself. Signed-off-by: David Hildenbrand <david@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-5-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/tcg: convert real to absolute address for RRBE, SSKE and ISKEDavid Hildenbrand1-0/+3
For RRBE, SSKE, and ISKE, we're dealing with real addresses, so we have to convert to an absolute address first. In the future, when adding EDAT1 support, we'll have to pay attention to SSKE handling, as we'll be dealing with absolute addresses when the multiple-block control is one. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-4-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/tcg: fix ignoring bit 63 when setting the storage key in SSKEDavid Hildenbrand1-1/+1
Right now we could set an 8-bit storage key via SSKE and retrieve it again via ISKE, which is against the architecture description: SSKE: " The new seven-bit storage-key value, or selected bits thereof, is obtained from bit positions 56-62 of gen- eral register R 1 . The contents of bit positions 0-55 and 63 of the register are ignored. " ISKE: " The seven-bit storage key is inserted in bit positions 56-62 of general register R 1 , and bit 63 is set to zero. " Let's properly ignore bit 63 to create the correct seven-bit storage key. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-3-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/tcg: wrap address for RRBEDavid Hildenbrand1-3/+4
Let's wrap the address just like for SSKE and ISKE. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210903155514.44772-2-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-09-06s390x/tcg: fix and optimize SPX (SET PREFIX)David Hildenbrand1-1/+14
We not only invalidate the translation of the range 0x0-0x2000, we also invalidate the translation of the new prefix range and the translation of the old prefix range -- because real2abs would return different results for all of these ranges when changing the prefix location. This fixes the kvm-unit-tests "edat" test that just hangs before this patch because we end up clearing the new prefix area instead of the old prefix area. While at it, let's not do anything in case the prefix doesn't change. Cc: Richard Henderson <richard.henderson@linaro.org> Cc: David Hildenbrand <david@redhat.com> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Thomas Huth <thuth@redhat.com> Cc: Claudio Imbrenda <imbrenda@linux.ibm.com> Cc: qemu-s390x@nongnu.org Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20210805125938.74034-1-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson1-24/+0
The hook is now unused, with breakpoints checked outside translation. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-21tcg: Rename helper_atomic_*_mmu and provide for user-onlyRichard Henderson1-12/+7
Always provide the atomic interface using TCGMemOpIdx oi and uintptr_t retaddr. Rename from helper_* to cpu_* so as to (mostly) match the exec/cpu_ldst.h functions, and to emphasize that they are not callable from TCG directly. Tested-by: Cole Robinson <crobinso@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-07-12Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210708' ↵Peter Maydell19-0/+19971
into staging s390x updates: - add gen16 cpumodels - refactor/cleanup some code - bugfixes # gpg: Signature made Thu 08 Jul 2021 12:26:21 BST # gpg: using EDDSA key 69A3B536F5CBFC65208026C1DE88BB5641DE66C1 # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF # Subkey fingerprint: 69A3 B536 F5CB FC65 2080 26C1 DE88 BB56 41DE 66C1 * remotes/cohuck-gitlab/tags/s390x-20210708: target/s390x: split sysemu part of cpu models target/s390x: move kvm files into kvm/ target/s390x: remove kvm-stub.c target/s390x: use kvm_enabled() to wrap call to kvm_s390_get_hpage_1m target/s390x: make helper.c sysemu-only target/s390x: split cpu-dump from helper.c target/s390x: move sysemu-only code out to cpu-sysemu.c target/s390x: start moving TCG-only code to tcg/ target/s390x: rename internal.h to s390x-internal.h target/s390x: remove tcg-stub.c hw/s390x: only build tod-tcg from the CONFIG_TCG build hw/s390x: tod: make explicit checks for accelerators when initializing hw/s390x: rename tod-qemu.c to tod-tcg.c target/s390x: meson: add target_user_arch s390x/tcg: Fix m5 vs. m4 field for VECTOR MULTIPLY SUM LOGICAL target/s390x: Fix CC set by CONVERT TO FIXED/LOGICAL s390x/cpumodel: add 3931 and 3932 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-07-07target/s390x: start moving TCG-only code to tcg/Cho, Yu-Chen19-0/+19982
move everything related to translate, as well as HELPER code in tcg/ mmu_helper.c stays put for now, as it contains both TCG and KVM code. After the reshuffling, update MAINTAINERS accordingly. Make use of the new directory: target/s390x/tcg/ Signed-off-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Cho, Yu-Chen <acho@suse.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210707105324.23400-8-acho@suse.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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