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path: root/target/rx/op_helper.c
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2023-06-05target/*: Add missing includes of tcg/debug-assert.hRichard Henderson1-0/+1
This had been pulled in from tcg/tcg.h, via exec/cpu_ldst.h, via exec/exec-all.h, but the include of tcg.h will be removed. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-10-24treewide: Remove the unnecessary space before semicolonBin Meng1-2/+2
%s/return ;/return; Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Message-Id: <20221024072802.457832-1-bmeng@tinylab.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-04-21Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson1-0/+1
Fix usp/isp swapping upon clrpsw/setpsw. Fix psw.i/pc upon wait. Align dtb in ram. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmJhlJYdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/ipQf+JLeXW1HaD5iNnyUl # Uh0CLvwwkXvuiDAlaoGCKl2mcVJR/2d/ScTPTGx44VEwmLpV2mgF8/VUWoRtao/C # Kal5DsaOAC2pUKkYbnorsCpq4ty2QMPYXZXOKULPcfLa3tbsr9bE6JkCQ6gZeAAk # ITuB+dfdBTpW2lc0eoQ7cDMcQkD1cxyfNVwZ7rP2i9N6tjTW1488kxsBthhQIr0t # sNrrBIiK7nhdgXNfhWDPP/6f8osZwhLGO8G9tyOTtkPOF6o6Dy27B0Bmlf5T6OY+ # SeTwC2O197gd0YkPWvZgMQbJWnX0kHgHwlFEBaMSxMXAcrlccNZQMyBN4cYoC+ie # e3vyWA== # =lj1s # -----END PGP SIGNATURE----- # gpg: Signature made Thu 21 Apr 2022 10:29:58 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-rx-20220421' of https://gitlab.com/rth7680/qemu: target/rx: update PC correctly in wait instruction target/rx: set PSW.I when executing wait instruction hw/rx: rx-gdbsim DTB load address aligned of 16byte. target/rx: Swap stack pointers on clrpsw/setpsw instruction target/rx: Move DISAS_UPDATE check for write to PSW target/rx: Store PSW.U in tb->flags target/rx: Put tb_flags into DisasContext Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-21target/rx: set PSW.I when executing wait instructionTomoaki Kawada1-0/+1
This patch fixes the implementation of the wait instruction to implicitly update PSW.I as required by the ISA specification. Signed-off-by: Tomoaki Kawada <i@yvt.jp> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220417045937.2128699-1-i@yvt.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau1-10/+12
G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in glib-compat. Note that this attribute must be placed before the function declaration (bringing a bit of consistency in qemu codebase usage). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Message-Id: <20220420132624.2439741-20-marcandre.lureau@redhat.com>
2021-10-15target/rx: Drop checks for singlestep_enabledRichard Henderson1-8/+0
GDB single-stepping is now handled generically. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-29target/rx: Fix compiler errors for build with sanitizersStefan Weil1-6/+6
gcc (Debian 10.2.1-6) 10.2.1 20210110 aborts builds with enabled sanitizers: ../../../target/rx/op_helper.c: In function ‘helper_scmpu’: ../../../target/rx/op_helper.c:213:24: error: ‘tmp1’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 213 | env->psw_c = (tmp0 >= tmp1); | ~~~~~~^~~~~~~~ ../../../target/rx/op_helper.c:213:24: error: ‘tmp0’ may be used uninitialized in this function [-Werror=maybe-uninitialized] ../../../target/rx/op_helper.c: In function ‘helper_suntil’: ../../../target/rx/op_helper.c:299:23: error: ‘tmp’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 299 | env->psw_c = (tmp <= env->regs[2]); | ~~~~~^~~~~~~~~~~~~~~~ ../../../target/rx/op_helper.c: In function ‘helper_swhile’: ../../../target/rx/op_helper.c:318:23: error: ‘tmp’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 318 | env->psw_c = (tmp <= env->regs[2]); | ~~~~~^~~~~~~~~~~~~~~~ Rewriting the code fixes those errors. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210128172127.46041-1-sw@weilnetz.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27target/rx: Fix some comment spelling errorsLichang Zhao1-1/+1
There are many spelling errors in the comments of target/rx. Use spellcheck to check the spelling errors, then fix them. Signed-off-by: zhaolichang <zhaolichang@huawei.com> Reviewed-by: David Edmondson <david.edmondson@oracle.com> Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org> Message-Id: <20201009064449.2336-5-zhaolichang@huawei.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-03-19target/rx: TCG helpersYoshinori Sato1-0/+470
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Removed tlb_fill, extracted from patch of Yoshinori Sato 'Convert to CPUClass::tlb_fill'] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200224141923.82118-6-ysato@users.sourceforge.jp> Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>