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path: root/target/ppc/translate.c
AgeCommit message (Expand)AuthorFilesLines
2022-12-21target/ppc: Implement the DEXCR and HDEXCRNicholas Miehlbradt1-0/+19
2022-10-28target/ppc: Increment PMC5 with inline insnsLeandro Lupori1-3/+25
2022-10-28target/ppc: Add new PMC HFLAGSLeandro Lupori1-0/+4
2022-10-28target/ppc: introduce ppc_maybe_interruptMatheus Ferst1-1/+10
2022-10-28target/ppc: Moved VMLADDUHM to decodetree and use gvecLucas Mateus Castro (alqotel)1-1/+0
2022-10-28target/ppc: move msgsync to decodetreeMatheus Ferst1-14/+0
2022-10-28target/ppc: move msgclrp/msgsndp to decodetreeMatheus Ferst1-26/+0
2022-10-28target/ppc: move msgclr/msgsnd to decodetreeMatheus Ferst1-32/+2
2022-10-28target/ppc: fix REQUIRE_HV macro definitionMatheus Ferst1-6/+6
2022-10-28target/ppc: fix msgsync insns flagsMatheus Ferst1-1/+1
2022-10-28target/ppc: fix msgclr/msgsnd insns flagsMatheus Ferst1-2/+2
2022-10-26target/ppc: Convert to tcg_ops restore_state_to_opcRichard Henderson1-6/+0
2022-09-20target/ppc: Zero second doubleword of VSR registers for FPR insnsVíctor Colombo1-0/+8
2022-09-20target/ppc: Implement hashst and hashchkVíctor Colombo1-0/+5
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson1-2/+3
2022-07-28target/ppc: Implement new wait variantsNicholas Piggin1-8/+88
2022-07-18target/ppc: Move slbsync to decodetreeLucas Coutinho1-17/+0
2022-07-18target/ppc: Move slbfee to decodetreeLucas Coutinho1-26/+0
2022-07-18target/ppc: Move slbmfee to decodetreeLucas Coutinho1-13/+0
2022-07-18target/ppc: Move slbmfev to decodetreeLucas Coutinho1-12/+0
2022-07-18target/ppc: Move slbmte to decodetreeLucas Coutinho1-14/+0
2022-07-18target/ppc: Move slbia to decodetreeLucas Coutinho1-17/+0
2022-07-18target/ppc: Move slbieg to decodetreeLucas Coutinho1-13/+0
2022-07-18target/ppc: Move slbie to decodetreeLucas Coutinho1-13/+0
2022-07-18target/ppc: add macros to check privilege levelMatheus Ferst1-0/+21
2022-07-18target/ppc: receive DisasContext explicitly in GEN_PRIVMatheus Ferst1-147/+152
2022-07-18target/ppc: Move tlbie[l] to decode treeLeandro Lupori1-62/+2
2022-07-18target/ppc: fix exception error code in spr_write_excp_vectorMatheus Ferst1-3/+3
2022-07-18target/ppc: remove mfdcrux and mtdcruxMatheus Ferst1-18/+0
2022-07-18target/ppc: fix exception error value in slbfeeMatheus Ferst1-2/+2
2022-07-18target/ppc: Fix gen_priv_exception error value in mfspr/mtsprMatheus Ferst1-4/+4
2022-05-26target/ppc: Implement lwsync with weaker memory orderingNicholas Piggin1-1/+7
2022-05-26target/ppc: Fix eieio memory ordering semanticsNicholas Piggin1-1/+26
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson1-3/+4
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-03-02target/ppc: implement plxssp/pstxsspLeandro Lupori1-22/+7
2022-03-02target/ppc: implement plxsd/pstxsdLeandro Lupori1-12/+2
2022-03-02target/ppc: Introduce TRANS*FLAGS macrosLuis Pires1-0/+19
2022-02-18target/ppc: Rename spr_tcg.h to spr_common.hFabiano Rosas1-1/+1
2022-02-09target/ppc: Remove PowerPC 601 CPUsCédric Le Goater1-842/+0
2022-01-28target/ppc: Remove support for the PowerPC 602 CPUCédric Le Goater1-30/+0
2022-01-28ppc/ppc405: Fix TLB flushingCédric Le Goater1-1/+1
2022-01-18target/ppc: Finish removal of 401/403 CPUsCédric Le Goater1-15/+1
2022-01-08exec/memop: Adding signedness to quad definitionsFrédéric Pétrot1-16/+16
2022-01-04ppc/ppc405: Introduce a store helper for SPR_40x_PIDCédric Le Goater1-0/+8
2022-01-04ppc/ppc405: Restore TCR and STR write handlersCédric Le Goater1-0/+12
2021-12-17PPC64/TCG: Implement 'rfebb' instructionDaniel Henrique Barboza1-0/+2
2021-12-17target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) eventDaniel Henrique Barboza1-0/+12
2021-12-17target/ppc: enable PMU instruction countDaniel Henrique Barboza1-0/+64
2021-12-17target/ppc: Remove the software TLB model of 7450 CPUsFabiano Rosas1-26/+0
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