riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-02-18	target/ppc: cpu_init: Move e300 SPR registration into a function	Fabiano Rosas	1	-29/+35
2022-02-18	target/ppc: cpu_init: Move 755 L2 cache SPRs into a function	Fabiano Rosas	1	-9/+15
2022-02-18	target/ppc: cpu_init: Deduplicate 7xx SPR registration	Fabiano Rosas	1	-57/+11
2022-02-18	target/ppc: cpu_init: Deduplicate 745/755 SPR registration	Fabiano Rosas	1	-31/+19
2022-02-18	target/ppc: cpu_init: Deduplicate 604 SPR registration	Fabiano Rosas	1	-10/+7
2022-02-18	target/ppc: cpu_init: Deduplicate 603 SPR registration	Fabiano Rosas	1	-19/+9
2022-02-18	target/ppc: cpu_init: Deduplicate 440 SPR registration	Fabiano Rosas	1	-74/+26
2022-02-18	target/ppc: cpu_init: Decouple 74xx SPR registration from 7xx	Fabiano Rosas	1	-16/+91
2022-02-18	target/ppc: cpu_init: Decouple G2 SPR registration from 755	Fabiano Rosas	1	-5/+20
2022-02-18	target/ppc: cpu_init: Move G2 SPRs into register_G2_sprs	Fabiano Rosas	1	-19/+22
2022-02-18	target/ppc: cpu_init: Move 405 SPRs into register_405_sprs	Fabiano Rosas	1	-11/+13
2022-02-18	target/ppc: cpu_init: Avoid nested SPR register functions	Fabiano Rosas	1	-3/+3
2022-02-18	target/ppc: cpu_init: Move Timebase registration into the common function	Fabiano Rosas	1	-80/+18
2022-02-18	target/ppc: cpu_init: Group registration of generic SPRs	Fabiano Rosas	1	-26/+32
2022-02-18	target/ppc: cpu_init: Remove G2LE init code	Fabiano Rosas	1	-41/+1
2022-02-18	target/ppc: cpu_init: Remove not implemented comments	Fabiano Rosas	1	-329/+253
2022-02-09	target/ppc: Merge 7x5 and 7x0 exception model IDs	Fabiano Rosas	1	-8/+8
2022-02-09	target/ppc: Merge exception model IDs for 6xx CPUs	Fabiano Rosas	1	-9/+9
2022-02-09	target/ppc: Remove PowerPC 601 CPUs	Cédric Le Goater	1	-213/+1
2022-02-09	target/ppc: Remove 440x4 CPU	Fabiano Rosas	1	-83/+0
2022-01-28	target/ppc: Remove support for the PowerPC 602 CPU	Cédric Le Goater	1	-147/+0
2022-01-28	target/ppc: 405: Add missing MSR_ME bit	Fabiano Rosas	1	-0/+1
2022-01-28	target/ppc: 405: Rename MSR_POW to MSR_WE	Fabiano Rosas	1	-1/+1
2022-01-12	target/ppc: Add extra float instructions to POWER5P processors	Cédric Le Goater	1	-0/+1
2022-01-12	target/ppc: Add popcntb instruction to POWER5+ processors	Cédric Le Goater	1	-0/+1
2022-01-04	target/ppc: Cache per-pmc insn and cycle count settings	Richard Henderson	1	-0/+1
2022-01-04	ppc/ppc405: Dump specific registers	Cédric Le Goater	1	-6/+21
2022-01-04	ppc/ppc405: Introduce a store helper for SPR_40x_PID	Cédric Le Goater	1	-1/+1
2022-01-04	ppc/ppc405: Restore TCR and STR write handlers	Cédric Le Goater	1	-2/+2
2021-12-17	target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event	Daniel Henrique Barboza	1	-1/+1
2021-12-17	target/ppc: PMU: update counters on MMCR1 write	Daniel Henrique Barboza	1	-1/+1
2021-12-17	target/ppc: PMU: update counters on PMCs r/w	Daniel Henrique Barboza	1	-6/+6
2021-12-17	target/ppc: PMU basic cycle count for pseries TCG	Daniel Henrique Barboza	1	-3/+3
2021-12-17	target/ppc: introduce PMUEventType and PMU overflow timers	Daniel Henrique Barboza	1	-0/+24
2021-12-17	target/ppc: Fix e6500 boot	Fabiano Rosas	1	-0/+6
2021-12-17	target/ppc: remove 401/403 CPUs	Cédric Le Goater	1	-512/+0
2021-12-17	target/ppc: Set 601v exception model id	Fabiano Rosas	1	-0/+1
2021-12-17	target/ppc: Remove 603e exception model	Fabiano Rosas	1	-30/+2
2021-12-17	target/ppc: Fix MPCxxx FPU interrupt address	Fabiano Rosas	1	-2/+2
2021-12-17	target/ppc: Remove the software TLB model of 7450 CPUs	Fabiano Rosas	1	-26/+0
2021-12-17	target/ppc: Disable unused facilities in the e600 CPU	Fabiano Rosas	1	-5/+1
2021-12-17	target/ppc: Disable software TLB for the 7450 family	Fabiano Rosas	1	-15/+10
2021-11-03	Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull...	Richard Henderson	1	-1/+1
2021-11-02	target/ppc: Implement ppc_cpu_record_sigsegv	Richard Henderson	1	-2/+4
2021-10-31	monitor: Trim some trailing space from human-readable output	Markus Armbruster	1	-1/+1
2021-10-21	target/ppc: adding user read/write functions for PMCs	Daniel Henrique Barboza	1	-6/+6
2021-10-21	target/ppc: add user read/write functions for MMCR2	Daniel Henrique Barboza	1	-1/+1
2021-10-21	target/ppc: add user read/write functions for MMCR0	Gustavo Romero	1	-1/+1
2021-09-14	target/ppc: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	1	-1/+1
2021-08-27	ppc: Add a POWER10 DD2 CPU	Cédric Le Goater	1	-0/+3