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path: root/target/ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2022-12-21target/ppc: Implement the DEXCR and HDEXCRNicholas Miehlbradt1-0/+19
2022-10-28target/ppc: Add new PMC HFLAGSLeandro Lupori1-1/+3
2022-10-28target/ppc: introduce ppc_maybe_interruptMatheus Ferst1-0/+1
2022-10-28target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY buildsMatheus Ferst1-1/+1
2022-10-28target/ppc: define PPC_INTERRUPT_* values directlyMatheus Ferst1-20/+20
2022-10-06dump: Replace opaque DumpState pointer with a typed oneJanosch Frank1-2/+2
2022-09-20target/ppc: Remove unused xer_* macrosVíctor Colombo1-4/+0
2022-09-20target/ppc: Remove extra space from s128 field in ppc_vsr_tVíctor Colombo1-1/+1
2022-09-20target/ppc: Add HASHKEYR and HASHPKEYR SPRsVíctor Colombo1-0/+2
2022-07-18target/ppc: remove mfdcrux and mtdcruxMatheus Ferst1-4/+2
2022-07-18ppc: Remove unused irq_inputsCédric Le Goater1-1/+0
2022-07-06target/ppc: Add flag for ISA v2.06 BCDA instructionsMatheus Ferst1-1/+4
2022-07-06ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy1-0/+12
2022-07-06target/ppc: Change FPSCR_* to follow POWER ISA numbering conventionVíctor Colombo1-36/+36
2022-05-26target/ppc: Implemented xvf16ger*Lucas Mateus Castro (alqotel)1-0/+3
2022-05-26target/ppc: Implemented xvf*ger*Lucas Mateus Castro (alqotel)1-0/+4
2022-05-26target/ppc: Implemented xvi*ger* instructionsLucas Mateus Castro (alqotel)1-0/+1
2022-05-26target/ppc: Implement xxm[tf]acc and xxsetacczLucas Mateus Castro (alqotel)1-0/+5
2022-05-26target/ppc: Implement lwsync with weaker memory orderingNicholas Piggin1-1/+3
2022-05-26target/ppc: Fix FPSCR.FI bit being cleared when it shouldn'tVíctor Colombo1-0/+2
2022-05-05target/ppc: Change MSR_* to follow POWER ISA numbering conventionVíctor Colombo1-43/+44
2022-05-05target/ppc: Add unused msr bits FIELDsVíctor Colombo1-0/+25
2022-05-05target/ppc: Remove msr_de macroVíctor Colombo1-2/+1
2022-05-05target/ppc: Remove msr_hv macroVíctor Colombo1-5/+6
2022-05-05target/ppc: Remove msr_ts macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_fe0 and msr_fe1 macrosVíctor Colombo1-2/+9
2022-05-05target/ppc: Remove msr_ep macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_dr macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_ir macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_cm macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_fp macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_gs macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_me macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_pow macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_ce macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_ee macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_ile macroVíctor Colombo1-2/+2
2022-05-05target/ppc: Remove msr_ds macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_le macroVíctor Colombo1-1/+1
2022-05-05target/ppc: Remove msr_pr macroVíctor Colombo1-1/+3
2022-05-05target/ppc: Remove unused msr_* macrosVíctor Colombo1-20/+0
2022-05-05target/ppc: Remove fpscr_* macros from cpu.hVíctor Colombo1-29/+0
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau1-7/+7
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau1-0/+1
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau1-1/+1
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé1-1/+1
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé1-2/+0
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé1-2/+1
2022-03-02target/ppc: trigger PERFM EBBs from power8-pmu.cDaniel Henrique Barboza1-0/+5
2022-03-02target/ppc: add PPC_INTERRUPT_EBB and EBB exceptionsDaniel Henrique Barboza1-1/+4
generated by cgit v1.1 at 2024-12-28 13:31:47 +0000