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Author
Files
Lines
2018-02-05
qdev: use device_class_set_parent_realize/unrealize/reset()
Philippe Mathieu-Daudé
1
-3
/
+2
2018-01-25
accel/tcg: add size paremeter in tlb_fill()
Laurent Vivier
3
-8
/
+8
2017-12-27
target/*helper: don't check retaddr before calling cpu_restore_state
Alex Bennée
1
-5
/
+1
2017-12-18
misc: remove duplicated includes
Philippe Mathieu-Daudé
1
-1
/
+0
2017-10-30
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...
Peter Maydell
2
-46
/
+26
2017-10-27
openrisc: cleanup cpu type name composition
Igor Mammedov
2
-46
/
+26
2017-10-27
Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into staging
Peter Maydell
1
-1
/
+1
2017-10-25
disas: Remove unused flags arguments
Richard Henderson
1
-1
/
+1
2017-10-24
tcg: Initialize cpu_env generically
Richard Henderson
1
-3
/
+0
2017-10-24
tcg: define tcg_init_ctx and make tcg_ctx a pointer
Emilio G. Cota
1
-1
/
+1
2017-10-24
tcg: convert tb->cflags reads to tb_cflags(tb)
Emilio G. Cota
1
-3
/
+3
2017-10-24
qom: Introduce CPUClass.tcg_initialize
Richard Henderson
1
-6
/
+1
2017-10-21
openrisc/cputimer: Perparation for Multicore
Stafford Horne
4
-5
/
+5
2017-10-21
target/openrisc: Make coreid and numcores variable
Stafford Horne
1
-2
/
+3
2017-10-09
qom/cpu: move cpu_model null check to cpu_class_by_name()
Philippe Mathieu-Daudé
1
-4
/
+0
2017-09-06
target: [tcg] Use a generic enum for DISAS_ values
Lluís Vilanova
1
-0
/
+6
2017-09-01
openrisc: replace cpu_openrisc_init() with cpu_generic_init()
Igor Mammedov
2
-8
/
+1
2017-07-19
tcg: Pass generic CPUState to gen_intermediate_code()
Lluís Vilanova
1
-2
/
+2
2017-05-04
target/openrisc: Support non-busy idle state using PMR SPR
Stafford Horne
5
-1
/
+28
2017-05-04
target/openrisc: Remove duplicate features property
Stafford Horne
2
-28
/
+5
2017-05-04
target/openrisc: Implement full vmstate serialization
Stafford Horne
1
-2
/
+71
2017-05-04
target/openrisc: implement shadow registers
Stafford Horne
6
-10
/
+33
2017-05-04
target/openrisc: add numcores and coreid support
Stafford Horne
1
-0
/
+6
2017-05-04
target/openrisc: Fixes for memory debugging
Stafford Horne
1
-4
/
+20
2017-04-21
target/openrisc: Implement EPH bit
Tim 'mithro' Ansell
1
-0
/
+3
2017-04-21
target/openrisc: Implement EVBAR register
Tim 'mithro' Ansell
4
-1
/
+21
2017-02-14
target/openrisc: Optimize for r0 being zero
Richard Henderson
3
-23
/
+66
2017-02-14
target/openrisc: Tidy handling of delayed branches
Richard Henderson
5
-35
/
+25
2017-02-14
target/openrisc: Tidy ppc/npc implementation
Richard Henderson
6
-55
/
+39
2017-02-14
target/openrisc: Optimize l.jal to next
Richard Henderson
1
-1
/
+5
2017-02-14
target/openrisc: Fix madd
Richard Henderson
4
-61
/
+30
2017-02-14
target/openrisc: Implement muld, muldu, macu, msbu
Richard Henderson
1
-0
/
+108
2017-02-14
target/openrisc: Represent MACHI:MACLO as a single unit
Richard Henderson
4
-61
/
+80
2017-02-14
target/openrisc: Implement msync
Richard Henderson
1
-0
/
+1
2017-02-14
target/openrisc: Enable trap, csync, msync, psync for user mode
Richard Henderson
1
-32
/
+0
2017-02-14
target/openrisc: Set flags on helpers
Richard Henderson
1
-12
/
+12
2017-02-14
target/openrisc: Use movcond where appropriate
Richard Henderson
1
-14
/
+14
2017-02-14
target/openrisc: Keep SR_CY and SR_OV in a separate variables
Richard Henderson
4
-89
/
+78
2017-02-14
target/openrisc: Keep SR_F in a separate variable
Richard Henderson
7
-74
/
+96
2017-02-14
target/openrisc: Invert the decoding in dec_calc
Richard Henderson
1
-207
/
+95
2017-02-14
target/openrisc: Put SR[OVE] in TB flags
Richard Henderson
3
-12
/
+18
2017-02-14
target/openrisc: Streamline arithmetic and OVE
Richard Henderson
5
-314
/
+191
2017-02-14
target/openrisc: Rationalize immediate extraction
Richard Henderson
1
-58
/
+40
2017-02-14
target/openrisc: Tidy insn dumping
Richard Henderson
1
-24
/
+12
2017-02-14
target/openrisc: Implement lwa, swa
Richard Henderson
7
-8
/
+81
2017-02-14
target/openrisc: Fix exception handling status registers
Stafford Horne
1
-0
/
+7
2017-02-14
target/openrisc: Rename the cpu from or32 to or1k
Richard Henderson
1
-1
/
+1
2017-01-13
cputlb: drop flush_global flag from tlb_flush
Alex Bennée
3
-3
/
+3
2017-01-13
qom/cpu: move tlb_flush to cpu_common_reset
Alex Bennée
2
-8
/
+4
2017-01-10
target-openrisc: Use clz and ctz opcodes
Richard Henderson
3
-23
/
+4
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