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2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé1-3/+2
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier3-7/+7
2018-01-16mips: Tweak location of ';' in macrosEric Blake1-16/+18
2017-12-29tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson1-1/+1
2017-10-30Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell4-29/+13
2017-10-27mips: malta/boston: replace cpu_model with cpu_typeIgor Mammedov4-29/+13
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell1-1/+1
2017-10-26tcg: Avoid setting tcg_initialize if !CONFIG_TCGRichard Henderson1-0/+2
2017-10-25disas: Remove unused flags argumentsRichard Henderson1-1/+1
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-4/+0
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-1/+1
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota1-13/+13
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson2-11/+1
2017-10-16linux-user: Tidy and enforce reserved_va initializationRichard Henderson1-1/+5
2017-10-10tcg: remove addr argument from lookup_tb_ptrEmilio G. Cota1-2/+2
2017-10-09qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé1-4/+0
2017-09-21mips: Improve macro parenthesizationEric Blake1-28/+28
2017-09-21mips: replace cpu_mips_init() with cpu_generic_init()Igor Mammedov2-19/+1
2017-09-21mips: MIPSCPU model subclassesIgor Mammedov5-64/+117
2017-09-21mips: call cpu_mips_realize_env() from mips_cpu_realizefn()Philippe Mathieu-Daudé2-1/+3
2017-09-21mips: split cpu_mips_realize_env() out of cpu_mips_init()Philippe Mathieu-Daudé2-7/+13
2017-09-21mips: introduce internal.h and cleanup cpu.hPhilippe Mathieu-Daudé11-353/+372
2017-09-21mips: move hw/mips/cputimer.c to target/mips/Philippe Mathieu-Daudé2-1/+165
2017-09-19target/mips: Convert VM clock update prints to warn_reportAlistair Francis1-3/+3
2017-09-19Convert single line fprintf(.../n) to warn_report()Alistair Francis1-2/+2
2017-08-02target/mips: Fix RDHWR CC with icountJames Hogan1-0/+11
2017-08-02target/mips: Drop redundant gen_io_start/stop()James Hogan1-8/+0
2017-08-02target/mips: Use BS_EXCP where interrupts are expectedJames Hogan1-13/+34
2017-08-02target-mips: apply CP0.PageMask before writing into TLB entryLeon Alrae1-2/+3
2017-08-02mips: Add KVM T&E segment support for TCGJames Hogan2-4/+4
2017-08-02mips: Improve segment defs for KVM T&E guestsJames Hogan1-12/+11
2017-08-02target-mips: Don't stop on [d]mtc0 DESAVE/KScratchJames Hogan1-4/+0
2017-07-31docs: fix broken paths to docs/devel/tracing.txtPhilippe Mathieu-Daudé1-1/+1
2017-07-21target/mips: Enable CP0_EBase.WG on MIPS64 CPUsJames Hogan1-0/+2
2017-07-21target/mips: Add EVA support to P5600James Hogan1-6/+8
2017-07-20target/mips: Implement segmentation controlJames Hogan1-39/+152
2017-07-20target/mips: Add segmentation control registersJames Hogan5-2/+150
2017-07-20target/mips: Add an MMU mode for ERLJames Hogan2-4/+23
2017-07-20target/mips: Abstract mmu_idx from hflagsJames Hogan3-4/+10
2017-07-20target/mips: Check memory permissions with mem_idxJames Hogan1-8/+9
2017-07-20target/mips: Decode microMIPS EVA load & store instructionsJames Hogan1-4/+115
2017-07-20target/mips: Decode MIPS32 EVA load & store instructionsJames Hogan1-0/+106
2017-07-20target/mips: Prepare loads/stores for EVAJames Hogan1-35/+42
2017-07-20target/mips: Add CP0_Ebase.WG (write gate) supportJames Hogan6-15/+31
2017-07-20target/mips: Weaken TLB flush on UX,SX,KX,ASID changesJames Hogan2-2/+2
2017-07-20target/mips: Fix TLBWI shadow flush for EHINV,XI,RIJames Hogan1-2/+10
2017-07-20target/mips: Fix MIPS64 MFC0 UserLocal on BE hostJames Hogan1-2/+3
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova1-3/+2
2017-07-17target/mips: optimize WSBH, DSBH and DSHDAurelien Jarno1-6/+12
2017-07-17mips: set CP0 Debug DExcCode for SDBBP instructionPavel Dovgalyuk1-0/+2