riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-01-14	target/mips: Convert Rel6 LL/SC opcodes to decodetree	Philippe Mathieu-Daudé	1	-2/+0
2021-01-14	target/mips: Convert Rel6 LLD/SCD opcodes to decodetree	Philippe Mathieu-Daudé	1	-2/+0
2021-01-14	target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetree	Philippe Mathieu-Daudé	1	-4/+1
2021-01-14	target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetree	Philippe Mathieu-Daudé	1	-4/+0
2021-01-14	target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetree	Philippe Mathieu-Daudé	1	-4/+1
2021-01-14	target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree	Philippe Mathieu-Daudé	1	-2/+0
2021-01-14	target/mips: Convert Rel6 COP1X opcode to decodetree	Philippe Mathieu-Daudé	1	-1/+0
2021-01-14	target/mips: Convert Rel6 Special2 opcode to decodetree	Philippe Mathieu-Daudé	1	-2/+0
2021-01-14	target/mips: Remove now unreachable LSA/DLSA opcodes code	Philippe Mathieu-Daudé	1	-23/+5
2021-01-14	target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodes	Philippe Mathieu-Daudé	1	-0/+5
2021-01-14	target/mips: Extract LSA/DLSA translation generators	Philippe Mathieu-Daudé	1	-32/+4
2021-01-14	target/mips: Use decode_ase_msa() generated from decodetree	Philippe Mathieu-Daudé	1	-22/+10
2021-01-14	target/mips: Extract MSA translation routines	Philippe Mathieu-Daudé	1	-2249/+0
2021-01-14	target/mips: Declare gen_msa/_branch() in 'translate.h'	Philippe Mathieu-Daudé	1	-2/+2
2021-01-14	target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ()	Philippe Mathieu-Daudé	1	-21/+48
2021-01-14	target/mips: Remove CPUMIPSState* argument from gen_msa*() methods	Philippe Mathieu-Daudé	1	-29/+28
2021-01-14	target/mips: Extract msa_translate_init() from mips_tcg_init()	Philippe Mathieu-Daudé	1	-13/+18
2021-01-14	target/mips: Alias MSA vector registers on FPU scalar registers	Philippe Mathieu-Daudé	1	-5/+9
2021-01-14	target/mips: Simplify MSA TCG logic	Philippe Mathieu-Daudé	1	-12/+11
2021-01-14	target/mips: Introduce ase_msa_available() helper	Philippe Mathieu-Daudé	1	-4/+2
2021-01-14	target/mips/translate: Expose check_mips_64() to 32-bit mode	Philippe Mathieu-Daudé	1	-5/+3
2021-01-14	target/mips/translate: Extract decode_opc_legacy() from decode_opc()	Philippe Mathieu-Daudé	1	-20/+29
2021-01-14	target/mips: Extract FPU specific definitions to translate.h	Philippe Mathieu-Daudé	1	-70/+0
2021-01-14	target/mips: Declare generic FPU / Coprocessor functions in translate.h	Philippe Mathieu-Daudé	1	-12/+12
2021-01-14	target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction	Philippe Mathieu-Daudé	1	-362/+367
2021-01-14	target/mips: Replace gen_exception_err(err=0) by gen_exception_end()	Philippe Mathieu-Daudé	1	-3/+3
2021-01-14	target/mips/translate: Add declarations for generic code	Philippe Mathieu-Daudé	1	-38/+14
2021-01-14	target/mips/translate: Extract DisasContext structure	Philippe Mathieu-Daudé	1	-37/+1
2021-01-14	target/mips: Extract FPU helpers to 'fpu_helper.h'	Philippe Mathieu-Daudé	1	-0/+1
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6	Philippe Mathieu-Daudé	1	-213/+213
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R5 as ISA_MIPS_R5	Philippe Mathieu-Daudé	1	-1/+1
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2	Philippe Mathieu-Daudé	1	-69/+69
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32 as ISA_MIPS_R1	Philippe Mathieu-Daudé	1	-27/+27
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6	Philippe Mathieu-Daudé	1	-1/+1
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2	Philippe Mathieu-Daudé	1	-2/+2
2021-01-14	target/mips/mips-defs: Use ISA_MIPS32 definition to check Release 1	Philippe Mathieu-Daudé	1	-5/+5
2020-12-13	target/mips: Move cpu definitions, reset() and realize() to cpu.c	Philippe Mathieu-Daudé	1	-240/+0
2020-12-13	target/mips: Extract cpu_supports/cpu_set translate.c	Philippe Mathieu-Daudé	1	-18/+0
2020-12-13	target/mips: Introduce ase_mt_available() helper	Philippe Mathieu-Daudé	1	-1/+1
2020-12-13	target/mips: Remove mips_def_t unused argument from mvp_init()	Philippe Mathieu-Daudé	1	-1/+1
2020-12-13	target/mips: Remove unused headers from translate.c	Philippe Mathieu-Daudé	1	-2/+0
2020-12-13	hw/mips: Move address translation helpers to target/mips/	Philippe Mathieu-Daudé	1	-2/+0
2020-12-13	target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()	Philippe Mathieu-Daudé	1	-2/+2
2020-11-03	target/mips: Add unaligned access support for MIPS64R6 and Loongson-3	Huacai Chen	1	-2/+2
2020-11-03	target/mips: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-10-17	target/mips: Add loongson-ext lsdc2 group of instructions	Jiaxun Yang	1	-0/+179
2020-10-17	target/mips: Add loongson-ext lswc2 group of instructions (Part 2)	Jiaxun Yang	1	-2/+180
2020-10-17	target/mips: Add loongson-ext lswc2 group of instructions (Part 1)	Jiaxun Yang	1	-0/+86
2020-10-17	target/mips: Fix some comment spelling errors	zhaolichang	1	-5/+5
2020-09-10	target/mips: simplify gen_compute_imm_branch logic	Alex Bennée	1	-10/+2