riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2020-12-13	target/mips: Use FloatRoundMode enum for FCR31 modes conversion	Philippe Mathieu-Daudé	1	-1/+2
2020-12-13	target/mips: Move cpu definitions, reset() and realize() to cpu.c	Philippe Mathieu-Daudé	1	-4/+0
2020-12-13	target/mips: Explicit Release 6 MMU types	Philippe Mathieu-Daudé	1	-4/+5
2020-12-13	target/mips: Include "exec/memattrs.h" in 'internal.h'	Philippe Mathieu-Daudé	1	-0/+1
2020-10-17	target/mips: Move cpu_mips_get_random() with CP0 helpers	Philippe Mathieu-Daudé	1	-1/+1
2020-10-17	target/mips: Fix some comment spelling errors	zhaolichang	1	-1/+1
2020-06-09	target/mips: Add Loongson-3 CPU definition	Huacai Chen	1	-0/+2
2020-06-09	target/mips: fpu: Refactor conversion from ieee to mips exception flags	Aleksandar Markovic	1	-1/+0
2020-03-17	gdbstub: extend GByteArray to read register helpers	Alex Bennée	1	-1/+1
2020-01-29	target/mips: Add implementation of GINVT instruction	Yongbok Kim	1	-0/+1
2019-10-01	target/mips: Clean up internal.h	Aleksandar Markovic	1	-23/+37
2019-09-12	target/mips: Switch to do_transaction_failed() hook	Peter Maydell	1	-3/+5
2019-08-19	target/mips: rationalise softfloat includes	Alex Bennée	1	-0/+7
2019-08-16	migration: Move the VMStateDescription typedef to typedefs.h	Markus Armbruster	1	-1/+1
2019-05-10	target/mips: Convert to CPUClass::tlb_fill	Richard Henderson	1	-2/+3
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster	1	-2/+1
2019-01-18	target/mips: Provide R/W access to SAARI and SAAR CP0 registers	Yongbok Kim	1	-0/+1
2018-10-18	target/mips: Implement hardware page table walker for MIPS32	Yongbok Kim	1	-0/+1
2018-10-18	target/mips: Improve DSP R2/R3-related naming	Stefan Markovic	1	-11/+19
2018-10-18	target/mips: Add availability control for DSP R3 ASE	Stefan Markovic	1	-3/+8
2018-10-18	target/mips: Increase 'supported ISAs/ASEs' flag holder size	Philippe Mathieu-Daudé	1	-1/+1
2018-01-25	accel/tcg: add size paremeter in tlb_fill()	Laurent Vivier	1	-1/+1
2017-09-21	mips: MIPSCPU model subclasses	Igor Mammedov	1	-0/+59
2017-09-21	mips: split cpu_mips_realize_env() out of cpu_mips_init()	Philippe Mathieu-Daudé	1	-0/+1
2017-09-21	mips: introduce internal.h and cleanup cpu.h	Philippe Mathieu-Daudé	1	-0/+362