| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-08-02 | mips: Add KVM T&E segment support for TCG | James Hogan | 1 | -2/+2 |
| 2017-08-02 | mips: Improve segment defs for KVM T&E guests | James Hogan | 1 | -12/+11 |
| 2017-07-20 | target/mips: Implement segmentation control | James Hogan | 1 | -39/+152 |
| 2017-07-20 | target/mips: Check memory permissions with mem_idx | James Hogan | 1 | -8/+9 |
| 2017-07-20 | target/mips: Add CP0_Ebase.WG (write gate) support | James Hogan | 1 | -6/+8 |
| 2017-07-20 | target/mips: Weaken TLB flush on UX,SX,KX,ASID changes | James Hogan | 1 | -1/+1 |
| 2017-07-17 | mips: set CP0 Debug DExcCode for SDBBP instruction | Pavel Dovgalyuk | 1 | -0/+2 |
| 2017-03-20 | target-mips: fix compiler warnings (clang 5) | Philippe Mathieu-Daudé | 1 | -4/+12 |
| 2017-01-13 | cputlb: drop flush_global flag from tlb_flush | Alex Bennée | 1 | -3/+3 |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth | 1 | -0/+969 |
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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