riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-06-24	target/mips: Optimize regnames[] arrays	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson	1	-1/+1
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Move CPUClass::vmsd to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé	1	-0/+8
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	1	-1/+1
2021-05-02	target/mips: Move CP0 helpers to sysemu/cp0.c	Philippe Mathieu-Daudé	1	-103/+0
2021-05-02	target/mips: Move exception management code to exception.c	Philippe Mathieu-Daudé	1	-113/+0
2021-05-02	target/mips: Move Special opcodes to tcg/sysemu/special_helper.c	Philippe Mathieu-Daudé	1	-17/+0
2021-05-02	target/mips: Restrict mmu_init() to TCG	Philippe Mathieu-Daudé	1	-1/+1
2021-05-02	target/mips: Declare mips_env_set_pc() inlined in "internal.h"	Philippe Mathieu-Daudé	1	-7/+1
2021-05-02	target/mips: Turn printfpr() macro into a proper function	Philippe Mathieu-Daudé	1	-27/+23
2021-05-02	target/mips: Restrict mips_cpu_dump_state() to cpu.c	Philippe Mathieu-Daudé	1	-0/+77
2021-05-02	target/mips: Optimize CPU/FPU regnames[] arrays	Philippe Mathieu-Daudé	1	-1/+1
2021-05-02	target/mips: Make CPU/FPU regnames[] arrays global	Philippe Mathieu-Daudé	1	-0/+7
2021-03-11	Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...	Peter Maydell	1	-1/+1
2021-03-10	semihosting: Move include/hw/semihosting/ -> include/semihosting/	Philippe Mathieu-Daudé	1	-1/+1
2021-03-08	clock: Add ClockEvent parameter to callbacks	Peter Maydell	1	-1/+1
2021-02-18	target/mips: Create mips_io_recompile_replay_branch	Richard Henderson	1	-0/+18
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana	1	-13/+23
2021-02-05	cpu: move do_unaligned_access to tcg_ops	Claudio Fontana	1	-1/+2
2021-02-05	cpu: move cc->transaction_failed to tcg_ops	Claudio Fontana	1	-1/+3
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana	1	-2/+2
2021-02-05	cpu: Move tlb_fill to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move cpu_exec_* to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move synchronize_from_tb() to tcg_ops	Eduardo Habkost	1	-1/+3
2021-02-05	cpu: Introduce TCGCpuOperations struct	Eduardo Habkost	1	-1/+1
2021-01-14	target/mips: Move msa_reset() to msa_helper.c	Philippe Mathieu-Daudé	1	-0/+1
2021-01-14	target/mips: Simplify msa_reset()	Philippe Mathieu-Daudé	1	-4/+1
2021-01-14	target/mips: Introduce ase_msa_available() helper	Philippe Mathieu-Daudé	1	-1/+1
2021-01-14	target/mips: Rename translate_init.c as cpu-defs.c	Philippe Mathieu-Daudé	1	-1/+1
2021-01-14	target/mips: Move common helpers from helper.c to cpu.c	Philippe Mathieu-Daudé	1	-6/+209
2021-01-14	target/mips: Inline cpu_state_reset() in mips_cpu_reset()	Philippe Mathieu-Daudé	1	-17/+9
2021-01-14	target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6	Philippe Mathieu-Daudé	1	-3/+3
2021-01-07	tcg: Make tb arg to synchronize_from_tb const	Richard Henderson	1	-1/+2
2021-01-04	target/mips: Don't use clock_get_ns() in clock period calculation	Peter Maydell	1	-2/+2
2020-12-19	qapi: Use QAPI_LIST_PREPEND() where possible	Eric Blake	1	-5/+1
2020-12-13	target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn()	Philippe Mathieu-Daudé	1	-12/+8
2020-12-13	target/mips: Move cpu definitions, reset() and realize() to cpu.c	Philippe Mathieu-Daudé	1	-0/+243
2020-12-13	target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c	Philippe Mathieu-Daudé	1	-0/+33
2020-12-13	target/mips: Extract cpu_supports/cpu_set translate.c	Philippe Mathieu-Daudé	1	-0/+18
2020-12-13	target/mips: Introduce ase_mt_available() helper	Philippe Mathieu-Daudé	1	-1/+1
2020-12-13	target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument	Philippe Mathieu-Daudé	1	-0/+5
2020-10-17	target/mips/cpu: Display warning when CPU is used without input clock	Philippe Mathieu-Daudé	1	-0/+10
2020-10-17	target/mips/cpu: Introduce mips_cpu_create_with_clock() helper	Philippe Mathieu-Daudé	1	-0/+12
2020-10-17	target/mips/cpu: Allow the CPU to use dynamic frequencies	Philippe Mathieu-Daudé	1	-2/+9
2020-10-17	target/mips/cpu: Make cp0_count_rate a property	Philippe Mathieu-Daudé	1	-8/+11
2020-10-17	target/mips/cpu: Calculate the CP0 timer period using the CPU frequency	Philippe Mathieu-Daudé	1	-2/+2
2020-10-17	target/mips: Move cp0_count_ns to CPUMIPSState	Philippe Mathieu-Daudé	1	-0/+21
2020-03-17	cpu: Use DeviceClass reset instead of a special CPUClass reset	Peter Maydell	1	-4/+4