riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-11-01	accel/tcg: Remove will_exit argument from cpu_restore_state	Richard Henderson	1	-1/+1
2021-11-02	target/microblaze: Make mb_cpu_tlb_fill sysemu only	Richard Henderson	1	-12/+1
2021-09-14	target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu	Philippe Mathieu-Daudé	1	-11/+2
2021-01-27	target/microblaze: Add security attributes on memory transactions	Joe Komlodi	1	-3/+23
2020-11-15	microblaze tcg cpus: Fix Lesser GPL version number	Chetan Pant	1	-1/+1
2020-09-07	target/microblaze: Move mmu parameters to MicroBlazeCPUConfig	Richard Henderson	1	-2/+2
2020-09-07	target/microblaze: Move pvr regs to MicroBlazeCPUConfig	Richard Henderson	1	-1/+1
2020-09-07	target/microblaze: Rename mmu structs	Richard Henderson	1	-2/+2
2020-09-07	target/microblaze: Cleanup mb_cpu_do_interrupt	Richard Henderson	1	-133/+106
2020-09-07	target/microblaze: Collected fixes for env->iflags	Richard Henderson	1	-6/+11
2020-09-01	target/microblaze: Reduce linux-user address space to 32-bit	Richard Henderson	1	-2/+2
2020-09-01	target/microblaze: Convert brk and brki to decodetree	Richard Henderson	1	-8/+2
2020-09-01	target/microblaze: Use cc->do_unaligned_access	Richard Henderson	1	-0/+28
2020-09-01	target/microblaze: Move bimm to BIMM_FLAG	Richard Henderson	1	-1/+1
2020-09-01	target/microblaze: Remove empty D macros	Richard Henderson	1	-7/+4
2020-09-01	target/microblaze: Split out MSR[C] to its own variable	Richard Henderson	1	-28/+30
2020-09-01	target/microblaze: Fix width of ESR	Richard Henderson	1	-1/+1
2020-09-01	target/microblaze: Fix width of MSR	Richard Henderson	1	-2/+2
2020-09-01	target/microblaze: Fix width of PC and BTARGET	Richard Henderson	1	-10/+6
2020-09-01	target/microblaze: Split out BTR from env->sregs	Richard Henderson	1	-2/+2
2020-09-01	target/microblaze: Split out ESR from env->sregs	Richard Henderson	1	-9/+9
2020-09-01	target/microblaze: Split out EAR from env->sregs	Richard Henderson	1	-3/+3
2020-09-01	target/microblaze: Split out MSR from env->sregs	Richard Henderson	1	-25/+24
2020-09-01	target/microblaze: Split out PC from env->sregs	Richard Henderson	1	-17/+17
2019-05-10	tcg: Use CPUClass::tlb_fill in cputlb.c	Richard Henderson	1	-6/+0
2019-05-10	target/microblaze: Convert to CPUClass::tlb_fill	Richard Henderson	1	-50/+57
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster	1	-1/+1
2018-05-29	target-microblaze: Consolidate MMU enabled checks	Edgar E. Iglesias	1	-3/+3
2018-05-29	target-microblaze: Make special registers 64-bit	Edgar E. Iglesias	1	-5/+10
2018-05-29	target-microblaze: Bypass MMU with MMU_NOMMU_IDX	Edgar E. Iglesias	1	-1/+2
2018-05-29	target-microblaze: Remove USE_MMU PVR checks	Edgar E. Iglesias	1	-11/+1
2018-05-29	target-microblaze: Tighten up TCGv_i32 vs TCGv type usage	Edgar E. Iglesias	1	-1/+1
2018-01-25	accel/tcg: add size paremeter in tlb_fill()	Laurent Vivier	1	-2/+2
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+307