Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-12-27 | target-m68k: free TCG variables that are not | Laurent Vivier | 1 | -9/+32 |
2016-12-27 | target-m68k: add rol/ror/roxl/roxr instructions | Laurent Vivier | 1 | -0/+391 |
2016-12-27 | target-m68k: Inline shifts | Richard Henderson | 3 | -80/+201 |
2016-12-27 | target-m68k: Do not cpu_abort on undefined insns | Richard Henderson | 1 | -3/+5 |
2016-12-27 | target-m68k: Implement 680x0 movem | Laurent Vivier | 1 | -23/+107 |
2016-12-27 | target-m68k: add cas/cas2 ops | Laurent Vivier | 3 | -0/+265 |
2016-12-27 | target-m68k: add abcd/sbcd/nbcd | Laurent Vivier | 1 | -0/+220 |
2016-12-27 | target-m68k: add 680x0 divu/divs variants | Laurent Vivier | 5 | -70/+211 |
2016-12-27 | target-m68k: add 64bit mull | Laurent Vivier | 1 | -12/+50 |
2016-12-27 | target-m68k: add cmpm | Laurent Vivier | 1 | -0/+16 |
2016-12-27 | target-m68k: Split gen_lea and gen_ea | Richard Henderson | 1 | -53/+59 |
2016-12-27 | target-m68k: Delay autoinc writeback | Richard Henderson | 1 | -20/+64 |
2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth | 11 | -0/+5921 |