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path: root/target/m68k/translate.c
AgeCommit message (Expand)AuthorFilesLines
2022-06-02target/m68k: Fix pc, c flag, and address argument for EXCP_DIV0Richard Henderson1-17/+16
2022-06-02target/m68k: Raise the TRAPn exception with the correct pcRichard Henderson1-1/+1
2022-05-26target/m68k: Enable halt insn for 68060Richard Henderson1-0/+1
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson1-3/+4
2021-10-15target/m68k: Drop checks for singlestep_enabledRichard Henderson1-35/+9
2021-09-14accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich1-1/+1
2021-07-21accel/tcg: Remove TranslatorOps.breakpoint_checkRichard Henderson1-18/+0
2021-07-09target/m68k: Use translator_use_goto_tbRichard Henderson1-11/+1
2021-07-09tcg: Avoid including 'trace-tcg.h' in target translate.cPhilippe Mathieu-Daudé1-1/+0
2021-05-26target/m68k: implement m68k "any instruction" trace modeMark Cave-Ayland1-7/+20
2021-05-26target/m68k: introduce gen_singlestep_exception() functionMark Cave-Ayland1-4/+13
2021-05-26target/m68k: call gen_raise_exception() directly if single-stepping in gen_jm...Mark Cave-Ayland1-1/+3
2021-05-26target/m68k: introduce is_singlestepping() functionMark Cave-Ayland1-4/+15
2021-03-11target/m68k: implement rtr instructionLaurent Vivier1-0/+20
2021-02-11m68k: MOVEC insn. should generate exception if wrong CR is accessedLucien Murray-Pitts1-1/+1
2020-12-12m68k: fix some comment spelling errorszhaolichang1-8/+8
2020-06-02target/m68k: implement opcode fetoxm1Laurent Vivier1-0/+3
2020-06-02target/m68k: implement fmove.l #<data>,FPCRLaurent Vivier1-0/+14
2020-01-21m68k: Fix regression causing Single-Step via GDB/RSP to not single stepLaurent Vivier1-15/+27
2020-01-15tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé1-1/+1
2019-10-28target/m68k: fetch code with translator_ldEmilio G. Cota1-1/+1
2019-09-03tcg: TCGMemOp is now accelerator independent MemOpTony Nguyen1-1/+1
2019-06-26m68k comments break patch submission due to being incorrectly formattedLucien Murray-Pitts1-85/+161
2019-06-10target/m68k: Use env_cpuRichard Henderson1-3/+1
2019-05-17target/m68k: Optimize rotate_x() using extract_i32()Philippe Mathieu-Daudé1-3/+2
2019-05-17target/m68k: Fix a tcg_temp leakPhilippe Mathieu-Daudé1-0/+1
2019-05-17target/m68k: Reduce the l1 TCGLabel scopePhilippe Mathieu-Daudé1-2/+1
2019-04-24tcg: Hoist max_insns computation to tb_gen_codeRichard Henderson1-2/+2
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster1-44/+44
2019-01-30target/m68k: Fix LGPL information in the file headersThomas Huth1-2/+2
2018-11-01target/m68k: use EXCP_ILLEGAL instead of EXCP_UNSUPPORTEDLaurent Vivier1-3/+3
2018-06-11target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insnRichard Henderson1-11/+6
2018-06-11target/m68k: Improve ending TB at page boundariesRichard Henderson1-3/+19
2018-06-11target/m68k: Convert to TranslatorOpsRichard Henderson1-92/+88
2018-06-11target/m68k: Convert to DisasContextBaseRichard Henderson1-70/+67
2018-06-11target/m68k: Rename DISAS_UPDATE and gen_lookup_tbRichard Henderson1-10/+10
2018-06-11target/m68k: Use lookup_and_goto_tb for DISAS_JUMPRichard Henderson1-1/+4
2018-06-11target/m68k: Remove DISAS_JUMP_NEXT as unusedRichard Henderson1-1/+0
2018-06-11target/m68k: Replace DISAS_TB_JUMP with DISAS_NORETURNRichard Henderson1-3/+1
2018-06-11target/m68k: Use DISAS_NORETURN for exceptionsRichard Henderson1-8/+8
2018-06-08target/m68k: Add trailing '\n' to qemu_log() callPhilippe Mathieu-Daudé1-1/+1
2018-06-01tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson1-3/+3
2018-05-20tcg: fix s/compliment/complement/ typosEmilio G. Cota1-1/+1
2018-05-11target/m68k: Fix build Werror with gcc 8.0.1Richard Henderson1-2/+3
2018-04-30m68k: fix subx mem, mem instructionPavel Dovgalyuk1-2/+2
2018-03-20target/m68k: add a mechanism to automatically free TCGvLaurent Vivier1-13/+43
2018-03-20target/m68k: add DisasContext parameter to gen_extend()Laurent Vivier1-23/+23
2018-03-13target/m68k: implement fcoshLaurent Vivier1-0/+3
2018-03-13target/m68k: implement fsinhLaurent Vivier1-0/+3
2018-03-13target/m68k: implement ftanhLaurent Vivier1-0/+3