| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-06-29 | target/m68k: add fmovem | Laurent Vivier | 1 | -0/+6 |
| 2017-06-29 | target/m68k: add explicit single and double precision operations (part 2) | Laurent Vivier | 1 | -1/+7 |
| 2017-06-29 | target/m68k: add fsglmul and fsgldiv | Laurent Vivier | 1 | -0/+2 |
| 2017-06-29 | target/m68k: add explicit single and double precision operations | Laurent Vivier | 1 | -0/+10 |
| 2017-06-29 | target/m68k: add fmovecr | Laurent Vivier | 1 | -0/+1 |
| 2017-06-21 | target-m68k: add FPCR and FPSR | Laurent Vivier | 1 | -2/+3 |
| 2017-06-21 | target-m68k: use floatx80 internally | Laurent Vivier | 1 | -15/+22 |
| 2017-01-14 | target-m68k: Implement bfffo | Richard Henderson | 1 | -0/+3 |
| 2017-01-14 | target-m68k: Implement bitfield ops for memory | Richard Henderson | 1 | -0/+7 |
| 2016-12-27 | target-m68k: Inline shifts | Richard Henderson | 1 | -3/+0 |
| 2016-12-27 | target-m68k: add cas/cas2 ops | Laurent Vivier | 1 | -0/+2 |
| 2016-12-27 | target-m68k: add 680x0 divu/divs variants | Laurent Vivier | 1 | -2/+6 |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth | 1 | -0/+49 |
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index : riscv-gnu-toolchain/qemu.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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