riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-06-19	tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode	Richard Henderson	1	-1/+0
2020-06-02	target/m68k: implement opcode fetoxm1	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fcosh	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fsinh	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement ftanh	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fatanh	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement facos	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fasin	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fatan	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fsincos	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fcos	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement fsin	Laurent Vivier	1	-0/+1
2018-03-13	target/m68k: implement ftan	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement ftentox	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement ftwotox	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement fetox	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement flog2	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement flog10	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement flogn	Laurent Vivier	1	-0/+1
2018-03-09	target/m68k: implement flognp1	Laurent Vivier	1	-0/+1
2018-03-04	target/m68k: add fscale, fgetman and fgetexp	Laurent Vivier	1	-0/+3
2018-03-04	target/m68k: add fmod/frem	Laurent Vivier	1	-0/+2
2018-01-25	target/m68k: add pflush/ptest	Laurent Vivier	1	-0/+2
2018-01-04	target/m68k: add the Interrupt Stack Pointer	Laurent Vivier	1	-1/+3
2018-01-04	target/m68k: add reset	Laurent Vivier	1	-0/+4
2018-01-04	target/m68k: add chk and chk2	Laurent Vivier	1	-0/+3
2017-10-24	target/m68k: check CF_PARALLEL instead of parallel_cpus	Emilio G. Cota	1	-0/+1
2017-06-29	target/m68k: add fmovem	Laurent Vivier	1	-0/+6
2017-06-29	target/m68k: add explicit single and double precision operations (part 2)	Laurent Vivier	1	-1/+7
2017-06-29	target/m68k: add fsglmul and fsgldiv	Laurent Vivier	1	-0/+2
2017-06-29	target/m68k: add explicit single and double precision operations	Laurent Vivier	1	-0/+10
2017-06-29	target/m68k: add fmovecr	Laurent Vivier	1	-0/+1
2017-06-21	target-m68k: add FPCR and FPSR	Laurent Vivier	1	-2/+3
2017-06-21	target-m68k: use floatx80 internally	Laurent Vivier	1	-15/+22
2017-01-14	target-m68k: Implement bfffo	Richard Henderson	1	-0/+3
2017-01-14	target-m68k: Implement bitfield ops for memory	Richard Henderson	1	-0/+7
2016-12-27	target-m68k: Inline shifts	Richard Henderson	1	-3/+0
2016-12-27	target-m68k: add cas/cas2 ops	Laurent Vivier	1	-0/+2
2016-12-27	target-m68k: add 680x0 divu/divs variants	Laurent Vivier	1	-2/+6
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+49