riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-08-24	target/loongarch: Split fcc register to fcc0-7 in gdbstub	Jiajie Chen	1	-9/+7
2023-08-24	target/loongarch: cpu: Implement get_arch_id callback	Bibo Mao	2	-0/+9
2023-08-24	target/loongarch: Add avail_IOCSR to check iocsr instructions	Song Gao	2	-9/+9
2023-08-24	target/loongarch: Add avail_LSX to check LSX instructions	Song Gao	2	-661/+823
2023-08-24	target/loongarch: Add avail_LAM to check atomic instructions	Song Gao	2	-36/+37
2023-08-24	target/loongarch: Add avail_LSPW to check LSPW instructions	Song Gao	2	-0/+9
2023-08-24	target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructions	Song Gao	7	-86/+159
2023-08-24	target/loongarch: Add LoongArch32 cpu la132	Jiajie Chen	1	-0/+30
2023-08-24	target/loongarch: Add avail_64 to check la64-only instructions	Song Gao	10	-123/+152
2023-08-24	target/loongarch: Add a check parameter to the TRANS macro	Song Gao	14	-944/+946
2023-08-24	target/loongarch: Sign extend results in VA32 mode	Jiajie Chen	1	-0/+3
2023-08-24	target/loongarch: Truncate high 32 bits of address in VA32 mode	Jiajie Chen	2	-2/+20
2023-08-24	target/loongarch: Extract set_pc() helper	Jiajie Chen	4	-11/+16
2023-08-24	target/loongarch: Extract make_address_pc() helper	Jiajie Chen	3	-3/+8
2023-08-24	target/loongarch: Extract make_address_i() helper	Jiajie Chen	6	-57/+29
2023-08-24	target/loongarch: Extract make_address_x() helper	Jiajie Chen	4	-20/+22
2023-08-24	target/loongarch: Add LA64 & VA32 to DisasContext	Jiajie Chen	3	-0/+18
2023-08-24	target/loongarch: Support LoongArch32 VPPN	Jiajie Chen	2	-7/+22
2023-08-24	target/loongarch: Support LoongArch32 DMW	Jiajie Chen	2	-7/+26
2023-08-24	target/loongarch: Support LoongArch32 TLB entry	Jiajie Chen	2	-9/+17
2023-08-24	target/loongarch: Add GDB support for loongarch32 mode	Jiajie Chen	2	-7/+35
2023-08-24	target/loongarch: Add new object class for loongarch32 cpus	Jiajie Chen	2	-0/+12
2023-08-24	target/loongarch: Add function to check current arch	Jiajie Chen	1	-0/+10
2023-08-24	target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_init	Philippe Mathieu-Daudé	1	-8/+15
2023-08-24	target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPU	Philippe Mathieu-Daudé	2	-3/+10
2023-08-24	target/loongarch: Fix loongarch_la464_initfn() misses setting LSPW	Song Gao	1	-0/+1
2023-08-24	target/loongarch: Remove duplicated disas_set_info assignment	Philippe Mathieu-Daudé	1	-1/+0
2023-08-24	target/loongarch: Log I/O write accesses to CSR registers	Philippe Mathieu-Daudé	1	-0/+2
2023-07-25	other architectures: spelling fixes	Michael Tokarev	1	-1/+1
2023-07-24	target/loongarch: Fix the CSRRD CPUID instruction on big endian hosts	Thomas Huth	4	-7/+12
2023-06-26	target: Widen pc/cs_base in cpu_get_tb_cpu_state	Anton Johansson	1	-4/+2
2023-06-20	meson: Replace softmmu_ss -> system_ss	Philippe Mathieu-Daudé	1	-3/+3
2023-06-16	target/loongarch: Fix CSR.DMW0-3.VSEG check	Jiajie Chen	1	-2/+2
2023-06-16	hw/intc: Set physical cpuid route for LoongArch ipi device	Tianrui Zhao	1	-0/+2
2023-06-05	target/*: Add missing includes of exec/translation-block.h	Richard Henderson	1	-2/+1
2023-06-05	accel/tcg: Introduce translator_io_start	Richard Henderson	3	-8/+2
2023-06-05	tcg: Pass TCGHelperInfo to tcg_gen_callN	Richard Henderson	1	-0/+4
2023-05-26	target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system core...	Song Gao	1	-13/+26
2023-05-26	target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV	Song Gao	2	-3/+5
2023-05-11	target/loongarch: Do not include tcg-ldst.h	Richard Henderson	2	-2/+0
2023-05-10	target/loongarch: Terminate vmstate subsections list	Richard Henderson	1	-0/+1
2023-05-06	target/loongarch: CPUCFG support LSX	Song Gao	1	-0/+1
2023-05-06	target/loongarch: Use {set/get}_gpr replace to cpu_fpr	Song Gao	5	-43/+129
2023-05-06	target/loongarch: Implement vldi	Song Gao	3	-0/+148
2023-05-06	target/loongarch: Implement vld vst	Song Gao	4	-0/+239
2023-05-06	target/loongarch: Implement vilvl vilvh vextrins vshuf	Song Gao	5	-0/+248
2023-05-06	target/loongarch: Implement vreplve vpack vpick	Song Gao	5	-0/+319
2023-05-06	target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vr	Song Gao	3	-0/+173
2023-05-06	target/loongarch: Implement vbitsel vset	Song Gao	5	-0/+174
2023-05-06	target/loongarch: Implement vfcmp	Song Gao	5	-0/+190