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AgeCommit message (Expand)AuthorFilesLines
2023-02-27target/loongarch/cpu: Restrict "memory.h" header to sysemuPhilippe Mathieu-Daudé1-0/+2
2023-02-27target/loongarch/cpu: Remove unused "sysbus.h" headerBernhard Beschow1-1/+0
2023-02-08Drop duplicate #includeMarkus Armbruster1-1/+0
2023-01-23target/loongarch: Disassemble pcadd* addressesRichard Henderson1-4/+33
2023-01-23target/loongarch: Disassemble jirl properlyRichard Henderson3-3/+4
2023-01-23target/loongarch: Enable the disassembler for host tcgRichard Henderson1-1/+2
2023-01-18bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plxPhilippe Mathieu-Daudé1-1/+1
2022-12-16target/loongarch: Convert to 3-phase resetPeter Maydell2-6/+10
2022-12-14cleanup: Tweak and re-run return_directly.cocciMarkus Armbruster1-3/+1
2022-11-07target/loongarch: Fix return value of CHECK_FPERui Wang1-1/+1
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang5-16/+18
2022-11-04target/loongarch: Fix emulation of float-point disable exceptionRui Wang6-11/+97
2022-11-04target/loongarch: Adjust the layout of hardware flags bit fieldsRui Wang3-3/+14
2022-11-04target/loongarch: Fix raise_mmu_exception() set wrong exception_indexSong Gao2-2/+4
2022-11-04target/loongarch: Add exception subcodeSong Gao2-29/+36
2022-11-04hw/intc: Fix LoongArch extioi coreisr accessingXiaojuan Yang1-8/+11
2022-10-26target/loongarch: Convert to tcg_ops restore_state_to_opcRichard Henderson2-6/+11
2022-10-17target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flagsSong Gao1-6/+6
2022-10-17target/loongarch: bstrins.w src register need EXT_NONESong Gao1-14/+22
2022-10-04accel/tcg: Introduce tb_pc and log_pcRichard Henderson1-1/+1
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson1-0/+9
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson1-2/+4
2022-08-13docs/system/loongarch: Update the LoongArch documentXiaojuan Yang1-48/+1
2022-08-08target/loongarch: Remove cpu_fcsr0Richard Henderson4-22/+20
2022-08-05target/loongarch: Update gdb_set_fpu() and gdb_get_fpu()Song Gao2-7/+30
2022-08-05target/loongarch: Update loongarch-fpu.xmlSong Gao1-1/+1
2022-08-05target/loongarch: add gdb_arch_name()Song Gao1-0/+6
2022-08-05target/loongarch: Fix GDB get the wrong pcSong Gao2-3/+6
2022-08-05target/loongarch: Fix macros SET_FPU_* in cpu.hQi Hu1-3/+15
2022-07-29hw/loongarch: Rename file 'loongson3.XXX' to 'virt.XXX'Xiaojuan Yang1-1/+1
2022-07-19hw/loongarch: Add fdt supportXiaojuan Yang2-0/+4
2022-07-19target/loongarch: Fix float_convd/float_convs test failingSong Gao1-63/+80
2022-07-19target/loongarch/cpu: Fix cpucfg default valueXiaojuan Yang1-1/+1
2022-07-19target/loongarch/op_helper: Fix coverity cond_at_most errorXiaojuan Yang1-1/+1
2022-07-19target/loongarch/tlb_helper: Fix coverity integer overflow errorXiaojuan Yang1-2/+2
2022-07-19target/loongarch/cpu: Fix coverity errors about excp_namesXiaojuan Yang1-3/+3
2022-07-19target/loongarch: Fix loongarch_cpu_class_by_nameXiaojuan Yang1-5/+15
2022-07-05target/loongarch: Clean up tlb when cpu resetSong Gao1-0/+1
2022-07-04target/loongarch: Add lock when writing timer clear regXiaojuan Yang1-0/+2
2022-07-04target/loongarch: Fix the meaning of ECFG reg's VS fieldXiaojuan Yang1-0/+4
2022-07-04target/loongarch: Update READMESong Gao1-2/+37
2022-07-04target/loongarch: Adjust functions and structure to support user-modeSong Gao6-1/+72
2022-07-04target/loongarch: remove unused include hw/loader.hSong Gao1-1/+0
2022-07-04target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptionSong Gao2-2/+4
2022-07-04target/loongarch: Fix missing update CSR_BADVSong Gao1-4/+6
2022-07-04target/loongarch: remove badaddr from CPULoongArchSong Gao2-3/+1
2022-06-06target/loongarch: Add gdb support.Xiaojuan Yang4-0/+95
2022-06-06hw/loongarch: Add LoongArch load elf function.Xiaojuan Yang1-0/+2
2022-06-06hw/loongarch: Add support loongson3 virt machine type.Xiaojuan Yang2-0/+4
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang6-0/+56
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