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AgeCommit message (Expand)AuthorFilesLines
2023-08-31target/helpers: Remove unnecessary 'qemu/main-loop.h' headerPhilippe Mathieu-Daudé2-2/+0
2023-08-31target/translate: Include missing 'exec/cpu_ldst.h' headerPhilippe Mathieu-Daudé1-0/+1
2023-08-24target/loongarch: Split fcc register to fcc0-7 in gdbstubJiajie Chen1-9/+7
2023-08-24target/loongarch: cpu: Implement get_arch_id callbackBibo Mao2-0/+9
2023-08-24target/loongarch: Add avail_IOCSR to check iocsr instructionsSong Gao2-9/+9
2023-08-24target/loongarch: Add avail_LSX to check LSX instructionsSong Gao2-661/+823
2023-08-24target/loongarch: Add avail_LAM to check atomic instructionsSong Gao2-36/+37
2023-08-24target/loongarch: Add avail_LSPW to check LSPW instructionsSong Gao2-0/+9
2023-08-24target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructionsSong Gao7-86/+159
2023-08-24target/loongarch: Add LoongArch32 cpu la132Jiajie Chen1-0/+30
2023-08-24target/loongarch: Add avail_64 to check la64-only instructionsSong Gao10-123/+152
2023-08-24target/loongarch: Add a check parameter to the TRANS macroSong Gao14-944/+946
2023-08-24target/loongarch: Sign extend results in VA32 modeJiajie Chen1-0/+3
2023-08-24target/loongarch: Truncate high 32 bits of address in VA32 modeJiajie Chen2-2/+20
2023-08-24target/loongarch: Extract set_pc() helperJiajie Chen4-11/+16
2023-08-24target/loongarch: Extract make_address_pc() helperJiajie Chen3-3/+8
2023-08-24target/loongarch: Extract make_address_i() helperJiajie Chen6-57/+29
2023-08-24target/loongarch: Extract make_address_x() helperJiajie Chen4-20/+22
2023-08-24target/loongarch: Add LA64 & VA32 to DisasContextJiajie Chen3-0/+18
2023-08-24target/loongarch: Support LoongArch32 VPPNJiajie Chen2-7/+22
2023-08-24target/loongarch: Support LoongArch32 DMWJiajie Chen2-7/+26
2023-08-24target/loongarch: Support LoongArch32 TLB entryJiajie Chen2-9/+17
2023-08-24target/loongarch: Add GDB support for loongarch32 modeJiajie Chen2-7/+35
2023-08-24target/loongarch: Add new object class for loongarch32 cpusJiajie Chen2-0/+12
2023-08-24target/loongarch: Add function to check current archJiajie Chen1-0/+10
2023-08-24target/loongarch: Extract 64-bit specifics to loongarch64_cpu_class_initPhilippe Mathieu-Daudé1-8/+15
2023-08-24target/loongarch: Introduce abstract TYPE_LOONGARCH64_CPUPhilippe Mathieu-Daudé2-3/+10
2023-08-24target/loongarch: Fix loongarch_la464_initfn() misses setting LSPWSong Gao1-0/+1
2023-08-24target/loongarch: Remove duplicated disas_set_info assignmentPhilippe Mathieu-Daudé1-1/+0
2023-08-24target/loongarch: Log I/O write accesses to CSR registersPhilippe Mathieu-Daudé1-0/+2
2023-07-25other architectures: spelling fixesMichael Tokarev1-1/+1
2023-07-24target/loongarch: Fix the CSRRD CPUID instruction on big endian hostsThomas Huth4-7/+12
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson1-4/+2
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé1-3/+3
2023-06-16target/loongarch: Fix CSR.DMW0-3.VSEG checkJiajie Chen1-2/+2
2023-06-16hw/intc: Set physical cpuid route for LoongArch ipi deviceTianrui Zhao1-0/+2
2023-06-05target/*: Add missing includes of exec/translation-block.hRichard Henderson1-2/+1
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson3-8/+2
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson1-0/+4
2023-05-26target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system core...Song Gao1-13/+26
2023-05-26target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADVSong Gao2-3/+5
2023-05-11target/loongarch: Do not include tcg-ldst.hRichard Henderson2-2/+0
2023-05-10target/loongarch: Terminate vmstate subsections listRichard Henderson1-0/+1
2023-05-06target/loongarch: CPUCFG support LSXSong Gao1-0/+1
2023-05-06target/loongarch: Use {set/get}_gpr replace to cpu_fprSong Gao5-43/+129
2023-05-06target/loongarch: Implement vldiSong Gao3-0/+148
2023-05-06target/loongarch: Implement vld vstSong Gao4-0/+239
2023-05-06target/loongarch: Implement vilvl vilvh vextrins vshufSong Gao5-0/+248
2023-05-06target/loongarch: Implement vreplve vpack vpickSong Gao5-0/+319
2023-05-06target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vrSong Gao3-0/+173
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