aboutsummaryrefslogtreecommitdiff
path: root/target/loongarch/translate.h
AgeCommit message (Collapse)AuthorFilesLines
2023-09-20target/loongarch: Add avail_LASX to check LASX instructionsSong Gao1-0/+1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914022645.1151356-14-gaosong@loongson.cn>
2023-08-24target/loongarch: Add avail_IOCSR to check iocsr instructionsSong Gao1-1/+1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-16-gaosong@loongson.cn> Message-Id: <20230822072219.35719-1-philmd@linaro.org>
2023-08-24target/loongarch: Add avail_LSX to check LSX instructionsSong Gao1-0/+2
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-15-gaosong@loongson.cn> Message-Id: <20230822073026.35776-1-philmd@linaro.org>
2023-08-24target/loongarch: Add avail_LAM to check atomic instructionsSong Gao1-0/+1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-14-gaosong@loongson.cn> Message-Id: <20230822071959.35620-8-philmd@linaro.org>
2023-08-24target/loongarch: Add avail_LSPW to check LSPW instructionsSong Gao1-0/+1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-13-gaosong@loongson.cn> Message-Id: <20230822071959.35620-7-philmd@linaro.org>
2023-08-24target/loongarch: Add avail_FP/FP_SP/FP_DP to check fpu instructionsSong Gao1-0/+4
Signed-off-by: Song Gao <gaosong@loongson.cn> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-12-gaosong@loongson.cn> Message-Id: <20230822071959.35620-6-philmd@linaro.org>
2023-08-24target/loongarch: Add avail_64 to check la64-only instructionsSong Gao1-0/+3
The la32 instructions listed in Table 2 at https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#overview-of-basic-integer-instructions Co-authored-by: Jiajie Chen <c@jia.je> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-9-gaosong@loongson.cn> Message-Id: <20230822071959.35620-3-philmd@linaro.org>
2023-08-24target/loongarch: Add a check parameter to the TRANS macroSong Gao1-2/+4
The default check parmeter is ALL. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-8-gaosong@loongson.cn> Message-Id: <20230822071959.35620-2-philmd@linaro.org>
2023-08-24target/loongarch: Add LA64 & VA32 to DisasContextJiajie Chen1-0/+2
Add LA64 and VA32(32-bit Virtual Address) to DisasContext to allow the translator to reject doubleword instructions in LA32 mode for example. Signed-off-by: Jiajie Chen <c@jia.je> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-ID: <20230822032724.1353391-5-gaosong@loongson.cn> Message-Id: <20230822071405.35386-5-philmd@linaro.org>
2023-05-06target/loongarch: Implement vadd/vsubSong Gao1-0/+1
This patch includes: - VADD.{B/H/W/D/Q}; - VSUB.{B/H/W/D/Q}. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230504122810.4094787-5-gaosong@loongson.cn>
2023-03-05target/loongarch: Drop temp_newRichard Henderson1-3/+0
Translators are no longer required to free tcg temporaries, therefore there's no need to record temps for later freeing. Replace the few uses with tcg_temp_new. Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-11-07target/loongarch: Separate the hardware flags into MMU index and PLVRui Wang1-1/+2
Regarding the patchset v3 has been merged into main line, and not approved, this patch updates to patchset v4. Fixes: b4bda200 ("target/loongarch: Adjust the layout of hardware flags bit fields") Link: https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg00808.html Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221107024526.702297-2-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-06-06target/loongarch: Add fixed point arithmetic instruction translationSong Gao1-0/+19
This includes: - ADD.{W/D}, SUB.{W/D} - ADDI.{W/D}, ADDU16ID - ALSL.{W[U]/D} - LU12I.W, LU32I.D LU52I.D - SLT[U], SLT[U]I - PCADDI, PCADDU12I, PCADDU18I, PCALAU12I - AND, OR, NOR, XOR, ANDN, ORN - MUL.{W/D}, MULH.{W[U]/D[U]} - MULW.D.W[U] - DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]} - ANDI, ORI, XORI Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-5-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06target/loongarch: Add main translation routinesSong Gao1-0/+26
This patch adds main translation routines and basic functions for translation. Signed-off-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-4-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.1 at 2024-12-26 16:46:12 +0000