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path: root/target/loongarch/disas.c
AgeCommit message (Expand)AuthorFilesLines
2023-05-06target/loongarch: Implement vaddw/vsubwSong Gao1-0/+43
2023-05-06target/loongarch: Implement vhaddw/vhsubwSong Gao1-0/+17
2023-05-06target/loongarch: Implement vsadd/vssubSong Gao1-0/+17
2023-05-06target/loongarch: Implement vnegSong Gao1-0/+10
2023-05-06target/loongarch: Implement vaddi/vsubiSong Gao1-0/+14
2023-05-06target/loongarch: Implement vadd/vsubSong Gao1-0/+23
2023-01-23target/loongarch: Disassemble pcadd* addressesRichard Henderson1-4/+33
2023-01-23target/loongarch: Disassemble jirl properlyRichard Henderson1-1/+1
2022-06-06target/loongarch: Add timer related instructions support.Xiaojuan Yang1-0/+3
2022-06-06target/loongarch: Add other core instructions supportXiaojuan Yang1-0/+17
2022-06-06target/loongarch: Add TLB instruction supportXiaojuan Yang1-0/+18
2022-06-06target/loongarch: Add LoongArch IOCSR instructionXiaojuan Yang1-0/+8
2022-06-06target/loongarch: Add LoongArch CSR instructionXiaojuan Yang1-0/+101
2022-06-06target/loongarch: Add disassemblerSong Gao1-0/+610