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2018-02-13hax: Support guest RAM sizes of 4GB or moreYu Ning8-25/+88
Since HAX_VM_IOCTL_ALLOC_RAM takes a 32-bit size, it cannot handle RAM blocks of 4GB or larger, which is why HAXM can only run guests with less than 4GB of RAM. Solve this problem by utilizing the new HAXM API, HAX_VM_IOCTL_ADD_RAMBLOCK, which takes a 64-bit size, to register RAM blocks with the HAXM kernel module. The new API is first added in HAXM 7.0.0, and its availablility and be confirmed by the presence of the HAX_CAP_64BIT_RAMBLOCK capability flag. When the guest RAM size reaches 7GB, QEMU will ask HAXM to set up a memory mapping that covers a 4GB region, which will fail, because HAX_VM_IOCTL_SET_RAM also takes a 32-bit size. Work around this limitation by splitting the large mapping into small ones and calling HAX_VM_IOCTL_SET_RAM multiple times. Bug: https://bugs.launchpad.net/qemu/+bug/1735576 Signed-off-by: Yu Ning <yu.ning@intel.com> Message-Id: <1515752555-12784-1-git-send-email-yu.ning@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-02-10Drop unneeded system header includesEric Blake2-3/+0
<memory.h> is a non-standard obsolete header that was long ago replaced by <string.h>. <malloc.h> is a non-standard header; it is not obsolete (we must use it for malloc_trim, for example), but generally should not be used in files that just need malloc() and friends, where <stdlib.h> is the standard header. And since osdep.h already guarantees string.h and stdlib.h, we can drop these unusual system header includes as redundant rather than replacing them. Signed-off-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2018-02-09Include qapi/qmp/qdict.h exactly where neededMarkus Armbruster2-0/+3
This cleanup makes the number of objects depending on qapi/qmp/qdict.h drop from 4550 (out of 4743) to 368 in my "build everything" tree. For qapi/qmp/qobject.h, the number drops from 4552 to 390. While there, separate #include from file comment with a blank line. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-13-armbru@redhat.com>
2018-02-09Eliminate qapi/qmp/types.hMarkus Armbruster1-1/+0
qapi/qmp/types.h is a convenience header to include a number of qapi/qmp/ headers. Since we rarely need all of the headers qapi/qmp/types.h includes, we bypass it most of the time. Most of the places that use it don't need all the headers, either. Include the necessary headers directly, and drop qapi/qmp/types.h. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-9-armbru@redhat.com>
2018-02-09Include qapi/error.h exactly where neededMarkus Armbruster2-1/+2
This cleanup makes the number of objects depending on qapi/error.h drop from 1910 (out of 4743) to 1612 in my "build everything" tree. While there, separate #include from file comment with a blank line, and drop a useless comment on why qemu/osdep.h is included first. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-5-armbru@redhat.com> [Semantic conflict with commit 34e304e975 resolved, OSX breakage fixed]
2018-02-09Drop superfluous includes of qapi-types.h and test-qapi-types.hMarkus Armbruster1-1/+0
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-4-armbru@redhat.com>
2018-02-09Clean up includesMarkus Armbruster2-4/+0
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes, with the change to target/s390x/gen-features.c manually reverted, and blank lines around deletions collapsed. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-3-armbru@redhat.com>
2018-02-09Use #include "..." for our own headers, <...> for othersMarkus Armbruster5-8/+2
System headers should be included with <...>, our own headers with "...". Offenders tracked down with an ugly, brittle and probably buggy Perl script. Previous iteration was commit a9c94277f0. Delete inclusions of "string.h" and "strings.h" instead of fixing them to <string.h> and <strings.h>, because we always include these via osdep.h. Put the cleaned up system header includes first. While there, separate #include from file comment with exactly one blank line. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-2-armbru@redhat.com>
2018-02-07Add the WHPX acceleration enlightenmentsJustin Terry (VM)1-1/+1
Implements the WHPX accelerator cpu enlightenments to actually use the whpx-all accelerator on Windows platforms. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1516655269-1785-5-git-send-email-juterry@microsoft.com> [Register/unregister VCPU thread with RCU. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-02-07Introduce the WHPX implJustin Terry (VM)2-0/+1367
Implements the Windows Hypervisor Platform accelerator (WHPX) target. Which acts as a hypervisor accelerator for QEMU on the Windows platform. This enables QEMU much greater speed over the emulated x86_64 path's that are taken on Windows today. 1. Adds support for vPartition management. 2. Adds support for vCPU management. 3. Adds support for MMIO/PortIO. 4. Registers the WHPX ACCEL_CLASS. Signed-off-by: Justin Terry (VM) <juterry@microsoft.com> Message-Id: <1516655269-1785-4-git-send-email-juterry@microsoft.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-02-05hvf: ept_emulation_fault() needs NetApp BSD attributionPaolo Bonzini1-0/+24
Add the BSD license there. Reported-by: Izik Eidus <izik@veertu.com> Message-Id: <20180123123639.35255-3-izik@veertu.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-02-05Add missing hvdos public domain attribution:Izik Eidus2-0/+6
hvf.c and vmx.h contain code from hvdos.c that is released as public domain: from hvdos github: https://github.com/mist64/hvdos "License See LICENSE.txt (2-clause-BSD). In order to simplify use of this code as a template, you can consider any parts from "hvdos.c" and "interface.h" as being in the public domain." Signed-off-by: Izik Eidus <izik@veertu.com> Message-Id: <20180123123639.35255-2-izik@veertu.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé1-4/+4
changes generated using the following Coccinelle patch: @@ type DeviceParentClass; DeviceParentClass *pc; DeviceClass *dc; identifier parent_fn; identifier child_fn; @@ ( +device_class_set_parent_realize(dc, child_fn, &pc->parent_fn); -pc->parent_fn = dc->realize; ... -dc->realize = child_fn; | +device_class_set_parent_unrealize(dc, child_fn, &pc->parent_fn); -pc->parent_fn = dc->unrealize; ... -dc->unrealize = child_fn; | +device_class_set_parent_reset(dc, child_fn, &pc->parent_fn); -pc->parent_fn = dc->reset; ... -dc->reset = child_fn; ) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180114020412.26160-4-f4bug@amsat.org> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-25accel/tcg: add size paremeter in tlb_fill()Laurent Vivier3-6/+6
The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
2018-01-17i386: Add EPYC-IBPB CPU modelEduardo Habkost1-0/+46
EPYC-IBPB is a copy of the EPYC CPU model with just CPUID_8000_0008_EBX_IBPB added. Cc: Jiri Denemark <jdenemar@redhat.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17i386: Add new -IBRS versions of Intel CPU modelsEduardo Habkost1-1/+378
The new MSR IA32_SPEC_CTRL MSR was introduced by a recent Intel microcode updated and can be used by OSes to mitigate CVE-2017-5715. Unfortunately we can't change the existing CPU models without breaking existing setups, so users need to explicitly update their VM configuration to use the new *-IBRS CPU model if they want to expose IBRS to guests. The new CPU models are simple copies of the existing CPU models, with just CPUID_7_0_EDX_SPEC_CTRL added and model_id updated. Cc: Jiri Denemark <jdenemar@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17i386: Add FEAT_8000_0008_EBX CPUID feature wordEduardo Habkost2-1/+21
Add the new feature word and the "ibpb" feature flag. Based on a patch by Paolo Bonzini. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17i386: Add spec-ctrl CPUID bitEduardo Habkost2-1/+2
Add the feature name and a CPUID_7_0_EDX_SPEC_CTRL macro. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17i386: Add support for SPEC_CTRL MSRPaolo Bonzini3-0/+37
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17i386: Change X86CPUDefinition::model_id to const char*Eduardo Habkost1-1/+8
It is valid to have a 48-character model ID on CPUID, however the definition of X86CPUDefinition::model_id is char[48], which can make the compiler drop the null terminator from the string. If a CPU model happens to have 48 bytes on model_id, "-cpu help" will print garbage and the object_property_set_str() call at x86_cpu_load_def() will read data outside the model_id array. We could increase the array size to 49, but this would mean the compiler would not issue a warning if a 49-char string is used by mistake for model_id. To make things simpler, simply change model_id to be const char*, and validate the string length using an assert() on x86_register_cpudef_type(). Reported-by: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180109154519.25634-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-17target/i386: add clflushopt to "Skylake-Server" cpu modelHaozhong Zhang1-1/+1
CPUID_7_0_EBX_CLFLUSHOPT is missed in current "Skylake-Server" cpu model. Add it to "Skylake-Server" cpu model on pc-i440fx-2.12 and pc-q35-2.12. Keep it disabled in "Skylake-Server" cpu model on older machine types. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> Message-Id: <20171219033730.12748-3-haozhong.zhang@intel.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-01-16irq: fix memory leaklinzhecheng1-0/+1
entry is moved from list but is not freed. Signed-off-by: linzhecheng <linzhecheng@huawei.com> Message-Id: <20171225024704.19540-1-linzhecheng@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16target-i386: update hflags on Hypervisor.frameworkPaolo Bonzini1-1/+1
This ensures that x86_cpu_dump_state shows registers with the correct size. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16target/i386: hax: Move x86_update_hflags.Tao Wu1-3/+1
x86_update_hflags reference env->efer which is updated in hax_get_msrs, so it has to be called after hax_get_msrs. This fix the bug that sometimes dump_state show 32 bits regs even in 64 bits mode. Signed-off-by: Tao Wu <lepton@google.com> Message-Id: <20180110195056.85403-3-lepton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16target/i386: hax: change to use x86_update_hflagsTao Wu1-51/+1
Change to use x86_update_hflags instead of keeping another copy at hax side. This also fix bug like HF_CPL_MASK should be SS.DPL, not CS.DPL. Signed-off-by: Tao Wu <lepton@google.com> Message-Id: <20180110195056.85403-2-lepton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-16target/i386: move hflags update code to a functionTao Wu3-39/+45
We will share the same code for hax/kvm. Signed-off-by: Tao Wu <lepton@google.com> Message-Id: <20180110195056.85403-1-lepton@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-12i386/cpu/kvm: look at PMU's CPUID before setting MSRsJan Dakinevich1-32/+48
Certain PMU-related MSRs are not supported for CPUs with PMU architecture below version 2. KVM rejects any access to them (see intel_is_valid_msr_idx routine in KVM), and QEMU fails on the following assertion: kvm_put_msrs: Assertion `ret == cpu->kvm_msr_buf->nmsrs' failed. QEMU also could fail if KVM exposes less fixed counters then 3. It could happen if host system run inside another hypervisor, which is tweaking PMU-related CPUID. To prevent possible fail, number of fixed counters now is obtained in the same way as number of GP counters. Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Jan Dakinevich <jan.dakinevich@virtuozzo.com> Message-Id: <1514383466-7257-1-git-send-email-jan.dakinevich@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-01-08Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171229' into stagingPeter Maydell2-10/+7
Queued TCG patches # gpg: Signature made Fri 29 Dec 2017 20:44:06 GMT # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20171229: tcg: add cs_base and flags to -d exec output tcg: Allow 6 arguments to TCG helpers tcg: Add tcg_signed_cond tcg: Generalize TCGOp parameters tcg: Dynamically allocate TCGOps tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* target/moxie: Fix tlb_fill target/*helper: don't check retaddr before calling cpu_restore_state Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-12-29tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED*Richard Henderson1-7/+6
These are now trivial sets and tests against NULL. Unwrap. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-12-27target/*helper: don't check retaddr before calling cpu_restore_stateAlex Bennée1-3/+1
cpu_restore_state officially supports being passed an address it can't resolve the state for. As a result the checks in the helpers are superfluous and can be removed. This makes the code consistent with other users of cpu_restore_state. Of course this does nothing to address what to do if cpu_restore_state can't resolve the state but so far it seems this is handled elsewhere. The change was made with included coccinelle script. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [rth: Fixed up comment indentation. Added second hunk to script to combine cpu_restore_state and cpu_loop_exit.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-12-22i386: hvf: cleanup x86_gen.hPaolo Bonzini9-9/+7
This only includes VM_PANIC now. No need to include it from headers. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove VM_PANIC from "in"Paolo Bonzini1-1/+1
Just give the obvious meaning to a 64-bit port, even though it should not really happen. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove addr_tPaolo Bonzini12-101/+101
Use target_ulong for virtual addresses and uint64_t for physical addresses. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: simplify flag handlingPaolo Bonzini3-357/+144
Remove much indirection and duplicate code, and provide a cleaner interface out of x86_flags.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: abort on decoding errorPaolo Bonzini2-7/+5
Rather than unsupported situations, some VM_PANIC calls actually are caused by internal errors. Convert them to just abort. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove ZERO_INIT macroPaolo Bonzini3-6/+4
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: remove more dead emulator codePaolo Bonzini8-60/+21
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: unify register enums between HVF and the restPaolo Bonzini11-271/+226
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: header cleanupPaolo Bonzini9-20/+17
Remove inclusions of system headers and avoid "pragma once". Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: move all hvf files in the same directoryPaolo Bonzini25-21/+21
Just call it hvf/, no need for the "utils" suffix. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: inject General Protection Fault when vmexit through vmcallSergio Andres Gomez Del Real1-1/+3
This patch injects a GP fault when the guest vmexit's by executing a vmcall instruction. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-15-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: refactor event injection code for hvfSergio Andres Gomez Del Real6-42/+102
This patch refactors the event-injection code for hvf by using the appropriate fields already provided by CPUX86State. At vmexit, it fills these fields so that hvf_inject_interrupts can just retrieve them without calling into hvf. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-14-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: implement vga dirty page trackingSergio Andres Gomez Del Real1-7/+66
This patch implements setting the tracking of dirty vga pages, using hvf's interface to protect guest memory. It uses the MemoryListener callback mechanism through .log_start/stop/sync Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-13-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: refactor KVM cpuid code so that it applies to hvf as wellSergio Andres Gomez Del Real2-22/+59
This patch generalizes some code in cpu.c for hypervisor-based accelerators, calling the new hvf_get_supported_cpuid where KVM used kvm_get_supported_cpuid. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-12-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: implement hvf_get_supported_cpuidSergio Andres Gomez Del Real1-0/+164
This patch implements hvf_get_supported_cpuid, which returns the set of features supported by both the host processor and the hypervisor. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-11-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: use new helper functions for put/get xsaveSergio Andres Gomez Del Real3-67/+12
This patch makes use of the helper functions for handling xsave in xsave_helper.c, which are shared with kvm. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-10-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: fix licensing issues; isolate task handling code (GPL v2-only)Sergio Andres Gomez Del Real18-253/+318
This patch replaces the license header for those files that were either GPL v2-or-v3, or GPL v2-only; the replacing license is GPL v2-or-later. The code for task switching/handling, which is derived from KVM and hence is GPL v2-only, is isolated in the new files (with this license) x86_task.c/.h, and the corresponding compilation rule is added to target/i386/hvf-utils/Makefile.objs. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-4-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-22i386: hvf: add code base from Google's QEMU repositorySergio Andres Gomez Del Real23-6/+8116
This file begins tracking the files that will be the code base for HVF support in QEMU. This code base is part of Google's QEMU version of their Android emulator, and can be found at https://android.googlesource.com/platform/external/qemu/+/emu-master-dev This code is based on Veertu Inc's vdhh (Veertu Desktop Hosted Hypervisor), found at https://github.com/veertuinc/vdhh. Everything is appropriately licensed under GPL v2-or-later, except for the code inside x86_task.c and x86_task.h, which, deriving from KVM (the Linux kernel), is licensed GPL v2-only. This code base already implements a very great deal of functionality, although Google's version removed from Vertuu's the support for APIC page and hyperv-related stuff. According to the Android Emulator Release Notes, Revision 26.1.3 (August 2017), "Hypervisor.framework is now enabled by default on macOS for 32-bit x86 images to improve performance and macOS compatibility", although we better use with caution for, as the same Revision warns us, "If you experience issues with it specifically, please file a bug report...". The code hasn't seen much update in the last 5 months, so I think that we can further develop the code with occasional visiting Google's repository to see if there has been any update. On top of Google's code, the following changes were made: - add code to the configure script to support the --enable-hvf argument. If the OS is Darwin, it checks for presence of HVF in the system. The patch also adds strings related to HVF in the file qemu-options.hx. QEMU will only support the modern syntax style '-M accel=hvf' no enable hvf; the legacy '-enable-hvf' will not be supported. - fix styling issues - add glue code to cpus.c - move HVFX86EmulatorState field to CPUX86State, changing the the emulation functions to have a parameter with signature 'CPUX86State *' instead of 'CPUState *' so we don't have to get the 'env'. Signed-off-by: Sergio Andres Gomez Del Real <Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-2-Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-3-Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-5-Sergio.G.DelReal@gmail.com> Message-Id: <20170913090522.4022-6-Sergio.G.DelReal@gmail.com> Message-Id: <20170905035457.3753-7-Sergio.G.DelReal@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-21cpu: refactor cpu_address_space_init()Peter Xu1-8/+2
Normally we create an address space for that CPU and pass that address space into the function. Let's just do it inside to unify address space creations. It'll simplify my next patch to rename those address spaces. Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20171123092333.16085-3-peterx@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-12-21target/i386: Fix handling of VEX prefixesPeter Maydell1-1/+1
In commit e3af7c788b73a6495eb9d94992ef11f6ad6f3c56 we replaced direct calls to to cpu_ld*_code() with calls to the x86_ld*_code() wrappers which incorporate an advance of s->pc. Unfortunately we didn't notice that in one place the old code was deliberately not incrementing s->pc: @@ -4501,7 +4528,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) static const int pp_prefix[4] = { 0, PREFIX_DATA, PREFIX_REPZ, PREFIX_REPNZ }; - int vex3, vex2 = cpu_ldub_code(env, s->pc); + int vex3, vex2 = x86_ldub_code(env, s); if (!CODE64(s) && (vex2 & 0xc0) != 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, This meant we were mishandling this set of instructions. Remove the manual advance of s->pc for the "is VEX" case (which is now done by x86_ldub_code()) and instead rewind PC in the case where we decide that this isn't really VEX. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org Reported-by: Alexandro Sanchez Bach <alexandro@phi.nz> Message-Id: <1513163959-17545-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>