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path: root/target/i386/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2020-06-10i386/kvm: fix a use-after-free when vcpu plug/unplugPan Nengyuan1-0/+1
2020-06-10i386/cpu: Store LAPIC bus frequency in CPU structureLiran Alon1-0/+1
2020-05-14target-arm: kvm64: handle SIGBUS signal from kernel or KVMDongjiu Geng1-0/+2
2020-03-31i386: Fix pkg_id offset for EPYC cpu modelsBabu Moger1-0/+1
2020-03-31i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinitionBabu Moger1-0/+1
2020-03-26linux-user/i386: Emulate x86_64 vsyscallsRichard Henderson1-0/+7
2020-03-26target/i386: Renumber EXCP_SYSCALLRichard Henderson1-3/+2
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell1-0/+3
2020-03-17hw/i386: Update structures to save the number of nodes per packageBabu Moger1-0/+1
2020-03-17i386: Add 2nd Generation AMD EPYC processorsMoger, Babu1-0/+2
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée1-1/+1
2020-01-24target/i386: add a ucode-rev propertyPaolo Bonzini1-0/+3
2020-01-15target/i386: Remove MMU_MODE{0,1,2}_SUFFIXRichard Henderson1-3/+0
2020-01-07target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIESXiaoyao Li1-5/+8
2019-12-13i386: Add macro for stibpCathy Zhang1-0/+2
2019-12-13i386: Add MSR feature bit for MDS-NOCathy Zhang1-0/+1
2019-11-21target/i386: add support for MSR_IA32_TSX_CTRLPaolo Bonzini1-0/+5
2019-10-26i386: implement IGNNEPaolo Bonzini1-1/+3
2019-10-26target/i386: move FERR handling to target/i386Paolo Bonzini1-1/+2
2019-10-23target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSRTao Xu1-0/+2
2019-10-23x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSETao Xu1-0/+2
2019-10-22i386/kvm: add NoNonArchitecturalCoreSharing Hyper-V enlightenmentVitaly Kuznetsov1-0/+2
2019-10-15target/i386: drop the duplicated definition of cpuid AVX512_VBMI macroTao Xu1-3/+2
2019-10-15target/i386: clean up comments over 80 chars per lineTao Xu1-59/+111
2019-10-04target/i386: add VMX featuresPaolo Bonzini1-0/+9
2019-10-04target/i386: add VMX definitionsPaolo Bonzini1-0/+130
2019-10-04target/i386: expand feature words to 64 bitsPaolo Bonzini1-1/+1
2019-10-04Fix wrong behavior of cpu_memory_rw_debug() function in SMMDmitry Poletaev1-1/+2
2019-10-04i386: Add CPUID bit for CLZERO and XSAVEERPTRSebastian Andrzej Siewior1-0/+2
2019-08-20x86: Intel AVX512_BF16 feature enablingJing Liu1-0/+7
2019-08-20kvm: i386: halt poll control MSR supportMarcelo Tosatti1-0/+1
2019-08-16migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster1-1/+1
2019-07-19target/i386: kvm: Demand nested migration kernel capabilities only when vCPU ...Liran Alon1-0/+22
2019-07-05i386: Make unversioned CPU models be aliasesEduardo Habkost1-0/+12
2019-07-05i386: Register versioned CPU modelsEduardo Habkost1-0/+10
2019-07-05i386: Add x-force-features option for testingEduardo Habkost1-0/+6
2019-07-05target/i386: Add CPUID.1F generation support for multi-dies PCMachineLike Xu1-0/+1
2019-07-05x86/cpu: use FeatureWordArray to define filtered_featuresWei Yang1-1/+1
2019-07-05i386: Fix signedness of hyperv_spinlock_attemptsEduardo Habkost1-1/+1
2019-07-05i386/cpu: Consolidate die-id validity in smp contextLike Xu1-0/+1
2019-07-05i386: Add die-level cpu topology to x86CPU on PCMachineLike Xu1-0/+2
2019-06-21target/i386: kvm: Add support for KVM_CAP_EXCEPTION_PAYLOADLiran Alon1-1/+5
2019-06-21target/i386: kvm: Add support for save and restore nested stateLiran Alon1-0/+3
2019-06-21target/i386: kvm: Block migration for vCPUs exposed with nested virtualizationLiran Alon1-0/+12
2019-06-21target/i386: define a new MSR based feature word - FEAT_CORE_CAPABILITYXiaoyao Li1-0/+5
2019-06-21i386/kvm: add support for Direct Mode for Hyper-V synthetic timersVitaly Kuznetsov1-0/+1
2019-06-21i386/kvm: implement 'hv-passthrough' modeVitaly Kuznetsov1-0/+1
2019-06-21i386/kvm: convert hyperv enlightenments properties from bools to bitsVitaly Kuznetsov1-14/+23
2019-06-11qemu-common: Move tcg_enabled() etc. to sysemu/tcg.hMarkus Armbruster1-1/+1
2019-06-10cpu: Remove CPU_COMMONRichard Henderson1-3/+1