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2021-06-19tcg: Combine dh_is_64bit and dh_is_signed to dh_typecodeRichard Henderson1-3/+0
We will shortly be interested in distinguishing pointers from integers in the helper's declaration, as well as a true void return. We currently have two parallel 1 bit fields; merge them and expand to a 3 bit field. Our current maximum is 7 helper arguments, plus the return makes 8 * 3 = 24 bits used within the uint32_t typemask. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-01-27target/hppa: Allow, but diagnose, LDCW aligned only mod 4Richard Henderson1-0/+2
The PA-RISC 1.1 specification says that LDCW must be aligned mod 16 or the operation is undefined. However, real hardware only generates an unaligned access trap for unaligned mod 4. Match real hardware, but diagnose with GUEST_ERROR a violation of the specification. At the same time fix a bug in the initialization of mop, where the size was specified twice, and another to free the zero temporary. Tested-by: Helge Deller <deller@gmx.de> Reported-by: Helge Deller <deller@gmx.de> Suggested-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-03-12target/hppa: add TLB protection id checkSven Schnelle1-0/+1
Signed-off-by: Sven Schnelle <svens@stackframe.org> Message-Id: <20190311191602.25796-10-svens@stackframe.org> [rth: Add required tlb flushing when prot id registers change.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31target/hppa: Implement PROBE for system modeRichard Henderson1-2/+1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31target/hppa: Implement halt and reset instructionsHelge Deller1-0/+2
Real hardware would use an external device to control the power. But for the moment let's invent instructions in reserved space, to be used by our custom firmware. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement LPARichard Henderson1-0/+1
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement P*TLB and P*TLBE insnsRichard Henderson1-0/+2
We now have all of the TLB manipulation instructions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement I*TLBA and I*TLBP insnsRichard Henderson1-0/+2
The TLB can now be populated, but it cannot yet be cleared. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement the interval timerRichard Henderson1-0/+3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement external interruptsRichard Henderson1-0/+2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement rfiRichard Henderson1-0/+2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Implement the system mask instructionsRichard Henderson1-0/+4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30target/hppa: Split address size from register sizeRichard Henderson1-8/+18
For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24target/hppa: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota1-0/+2
Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-01-23target-hppa: Implement floating-point insnsRichard Henderson1-0/+55
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement system and memory-management insnsRichard Henderson1-0/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement loads and storesRichard Henderson1-0/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Implement basic arithmeticRichard Henderson1-0/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23target-hppa: Add framework and enable compilationRichard Henderson1-0/+3
This is just about the minimum required to enable compilation without actually executing any instructions. This contains the HPPACPU structure and the required callbacks, the gdbstub, the basic translation loop, and a translate_one function that always results in an illegal instruction. Signed-off-by: Richard Henderson <rth@twiddle.net>
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