| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-05-26 | hw/core: Constify TCGCPUOps | Richard Henderson | 1 | -1/+1 |
| 2021-05-05 | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul... | Peter Maydell | 3 | -3/+0 |
| 2021-05-02 | hw: Do not include qemu/log.h if it is not necessary | Thomas Huth | 3 | -3/+0 |
| 2021-05-01 | Hexagon (target/hexagon) CABAC decode bin | Taylor Simpson | 6 | -0/+165 |
| 2021-05-01 | Hexagon (target/hexagon) load into shifted register instructions | Taylor Simpson | 3 | -0/+88 |
| 2021-05-01 | Hexagon (target/hexagon) load and unpack bytes instructions | Taylor Simpson | 5 | -0/+186 |
| 2021-05-01 | Hexagon (target/hexagon) bit reverse (brev) addressing | Taylor Simpson | 7 | -0/+50 |
| 2021-05-01 | Hexagon (target/hexagon) circular addressing | Taylor Simpson | 7 | -23/+346 |
| 2021-05-01 | Hexagon (target/hexagon) add A4_addp_c/A4_subp_c | Taylor Simpson | 4 | -0/+65 |
| 2021-05-01 | Hexagon (target/hexagon) add A6_vminub_RdP | Taylor Simpson | 4 | -0/+60 |
| 2021-05-01 | Hexagon (target/hexagon) add A5_ACS (vacsh) | Taylor Simpson | 5 | -0/+60 |
| 2021-05-01 | Hexagon (target/hexagon) add F2_sfinvsqrta | Taylor Simpson | 7 | -1/+77 |
| 2021-05-01 | Hexagon (target/hexagon) add F2_sfrecipa instruction | Taylor Simpson | 7 | -3/+101 |
| 2021-05-01 | Hexagon (target/hexagon) compile all debug code | Taylor Simpson | 6 | -94/+81 |
| 2021-05-01 | Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h | Taylor Simpson | 1 | -1/+2 |
| 2021-05-01 | Hexagon (target/hexagon) cleanup reg_field_info definition | Taylor Simpson | 2 | -4/+3 |
| 2021-05-01 | Hexagon (target/hexagon) cleanup ternary operators in semantics | Taylor Simpson | 1 | -6/+6 |
| 2021-05-01 | Hexagon (target/hexagon) use softfloat for float-to-int conversions | Taylor Simpson | 6 | -259/+136 |
| 2021-05-01 | Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn | Taylor Simpson | 1 | -17/+11 |
| 2021-05-01 | Hexagon (target/hexagon) use softfloat default NaN and tininess | Taylor Simpson | 2 | -47/+5 |
| 2021-05-01 | Hexagon (target/hexagon) change type of softfloat_roundingmodes | Taylor Simpson | 1 | -1/+1 |
| 2021-05-01 | Hexagon (target/hexagon) remove unused carry_from_add64 function | Taylor Simpson | 3 | -16/+0 |
| 2021-05-01 | Hexagon (target/hexagon) change variables from int to bool when appropriate | Taylor Simpson | 6 | -59/+60 |
| 2021-05-01 | Hexagon (target/hexagon) decide if pred has been written at TCG gen time | Taylor Simpson | 4 | -10/+25 |
| 2021-05-01 | Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN | Taylor Simpson | 2 | -32/+33 |
| 2021-05-01 | Hexagon (target/hexagon) use env_archcpu and env_cpu | Taylor Simpson | 4 | -9/+4 |
| 2021-05-01 | Hexagon (target/hexagon) remove unnecessary inline directives | Taylor Simpson | 5 | -47/+46 |
| 2021-05-01 | Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair | Taylor Simpson | 1 | -14/+13 |
| 2021-05-01 | Hexagon (target/hexagon) TCG generation cleanup | Taylor Simpson | 1 | -5/+9 |
| 2021-05-01 | target/hexagon: remove unnecessary semicolons | Taylor Simpson | 1 | -2/+2 |
| 2021-05-01 | target/hexagon: fix typo in comment | Taylor Simpson | 1 | -1/+1 |
| 2021-05-01 | target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM | Taylor Simpson | 1 | -2/+2 |
| 2021-05-01 | target/hexagon: remove unnecessary checks in find_iclass_slots | Taylor Simpson | 1 | -4/+0 |
| 2021-05-01 | target/hexagon: translation changes | Taylor Simpson | 1 | -17/+9 |
| 2021-04-01 | hexagon: do not specify Python scripts as inputs | Paolo Bonzini | 1 | -20/+10 |
| 2021-04-01 | hexagon: do not specify executables as inputs | Paolo Bonzini | 1 | -4/+2 |
| 2021-03-09 | target/hexagon/gen_tcg_funcs: Fix a typo | Philippe Mathieu-Daudé | 1 | -7/+7 |
| 2021-03-06 | target/hexagon/opcodes: Add missing varargs cleanup | Philippe Mathieu-Daudé | 1 | -0/+1 |
| 2021-03-06 | target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR | Taylor Simpson | 1 | -2/+2 |
| 2021-02-18 | Hexagon build infrastructure | Taylor Simpson | 1 | -0/+191 |
| 2021-02-18 | Hexagon (target/hexagon) translation | Taylor Simpson | 2 | -0/+841 |
| 2021-02-18 | Hexagon (target/hexagon) TCG for floating point instructions | Taylor Simpson | 1 | -0/+121 |
| 2021-02-18 | Hexagon (target/hexagon) TCG for instructions with multiple definitions | Taylor Simpson | 1 | -0/+198 |
| 2021-02-18 | Hexagon (target/hexagon) TCG generation | Taylor Simpson | 2 | -0/+356 |
| 2021-02-18 | Hexagon (target/hexagon) instruction classes | Taylor Simpson | 3 | -0/+174 |
| 2021-02-18 | Hexagon (target/hexagon) macros | Taylor Simpson | 1 | -0/+592 |
| 2021-02-18 | Hexagon (target/hexagon) opcode data structures | Taylor Simpson | 2 | -0/+200 |
| 2021-02-18 | Hexagon (target/hexagon) generater phase 4 - decode tree | Taylor Simpson | 1 | -0/+351 |
| 2021-02-18 | Hexagon (target/hexagon) generator phase 3 - C preprocessor for decode tree | Taylor Simpson | 1 | -0/+188 |
| 2021-02-18 | Hexagon (target/hexagon) generator phase 2 - generate header files | Taylor Simpson | 10 | -0/+1565 |
