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Author
Files
Lines
2020-09-09
Use OBJECT_DECLARE_TYPE where possible
Eduardo Habkost
1
-4
/
+2
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
1
-6
/
+2
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
1
-3
/
+5
2020-08-21
meson: target
Paolo Bonzini
4
-36
/
+22
2020-08-21
meson: rename included C source files to .c.inc
Paolo Bonzini
3
-4
/
+4
2020-07-11
target/avr/disas: Fix store instructions display order
Philippe Mathieu-Daudé
1
-10
/
+10
2020-07-11
target/avr/cpu: Fix $PC displayed address
Philippe Mathieu-Daudé
1
-1
/
+1
2020-07-11
target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()
Philippe Mathieu-Daudé
1
-2
/
+0
2020-07-11
target/avr: Register AVR support with the rest of QEMU
Michael Rolnik
1
-0
/
+34
2020-07-11
target/avr: Add support for disassembling via option '-d in_asm'
Michael Rolnik
4
-1
/
+259
2020-07-11
target/avr: Initialize TCG register variables
Michael Rolnik
1
-0
/
+29
2020-07-11
target/avr: Add instruction translation - CPU main translation function
Michael Rolnik
1
-0
/
+213
2020-07-11
target/avr: Add instruction translation - MCU Control Instructions
Michael Rolnik
2
-0
/
+73
2020-07-11
target/avr: Add instruction translation - Bit and Bit-test Instructions
Michael Rolnik
2
-0
/
+261
2020-07-11
target/avr: Add instruction translation - Data Transfer Instructions
Michael Rolnik
2
-0
/
+1046
2020-07-11
target/avr: Add instruction translation - Branch Instructions
Michael Rolnik
2
-0
/
+576
2020-07-11
target/avr: Add instruction translation - Arithmetic and Logic Instructions
Michael Rolnik
2
-0
/
+896
2020-07-11
target/avr: Add instruction translation - Register definitions
Michael Rolnik
1
-0
/
+142
2020-07-11
target/avr: Add instruction helpers
Michael Rolnik
2
-0
/
+238
2020-07-10
target/avr: Add definitions of AVR core types
Michael Rolnik
1
-0
/
+151
2020-07-10
target/avr: Introduce enumeration AVRFeature
Michael Rolnik
1
-0
/
+46
2020-07-10
target/avr: CPU class: Add GDB support
Michael Rolnik
3
-0
/
+90
2020-07-10
target/avr: CPU class: Add migration support
Michael Rolnik
3
-0
/
+122
2020-07-10
target/avr: CPU class: Add memory management support
Michael Rolnik
2
-0
/
+53
2020-07-10
target/avr: CPU class: Add interrupt handling support
Michael Rolnik
2
-0
/
+91
2020-07-10
target/avr: Introduce basic CPU class object
Michael Rolnik
3
-0
/
+399
2020-07-10
target/avr: Add basic parameters of the new platform
Michael Rolnik
2
-0
/
+102
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