riscv-gnu-toolchain/qemu.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2021-09-14	target/avr: Remove pointless use of CONFIG_USER_ONLY definition	Philippe Mathieu-Daudé	1	-3/+0
2021-07-21	target/avr: Implement gdb_adjust_breakpoint	Richard Henderson	1	-0/+1
2021-05-26	hw/core: Constify TCGCPUOps	Richard Henderson	1	-1/+1
2021-05-26	cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Introduce SysemuCPUOps structure	Philippe Mathieu-Daudé	1	-0/+6
2021-05-26	cpu: Move AVR target vmsd field from CPUClass to DeviceClass	Philippe Mathieu-Daudé	1	-1/+1
2021-05-26	cpu: Rename CPUClass vmsd -> legacy_vmsd	Philippe Mathieu-Daudé	1	-1/+1
2021-02-20	target/avr/cpu: Use device_class_set_parent_realize()	Philippe Mathieu-Daudé	1	-3/+1
2021-02-05	cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass	Claudio Fontana	1	-5/+14
2021-02-05	cpu: move cc->do_interrupt to tcg_ops	Claudio Fontana	1	-1/+1
2021-02-05	cpu: Move tlb_fill to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move cpu_exec_* to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Move synchronize_from_tb() to tcg_ops	Eduardo Habkost	1	-1/+1
2021-02-05	cpu: Introduce TCGCpuOperations struct	Eduardo Habkost	1	-1/+1
2021-01-07	tcg: Make tb arg to synchronize_from_tb const	Richard Henderson	1	-1/+2
2020-07-11	target/avr/cpu: Fix $PC displayed address	Philippe Mathieu-Daudé	1	-1/+1
2020-07-11	target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()	Philippe Mathieu-Daudé	1	-2/+0
2020-07-11	target/avr: Add support for disassembling via option '-d in_asm'	Michael Rolnik	1	-1/+1
2020-07-10	target/avr: Add definitions of AVR core types	Michael Rolnik	1	-0/+151
2020-07-10	target/avr: CPU class: Add GDB support	Michael Rolnik	1	-0/+4
2020-07-10	target/avr: CPU class: Add migration support	Michael Rolnik	1	-0/+1
2020-07-10	target/avr: CPU class: Add memory management support	Michael Rolnik	1	-0/+3
2020-07-10	target/avr: CPU class: Add interrupt handling support	Michael Rolnik	1	-0/+2
2020-07-10	target/avr: Introduce basic CPU class object	Michael Rolnik	1	-0/+207